FPGA Development Team Lead

WHO WE ARE

Optiver is a global market maker founded in Amsterdam, with offices in London, Chicago, Austin, New York, Sydney, Shanghai, Hong Kong, Singapore, Taipei and Mumbai. Established in 1986, today we are a leading liquidity provider, with close to 2,000 employees in offices around the world, united in our commitment to improve the market through competitive pricing, execution and risk management. By providing liquidity on multiple exchanges across the world in various financial instruments we participate in the safeguarding of healthy and efficient markets. We provide liquidity to financial markets using our own capital, at our own risk, trading a wide range of products: listed derivatives, cash equities, ETFs, bonds and foreign currencies.

In Asia Pacific, Optiver was one of the first global market makers to establish a presence in the region, with the incorporation our Sydney office in 1996. Since then, we have expanded our footprint by establishing offices in Taipei (2005), Hong Kong (2007), Shanghai and Singapore The business in Mumbai is newly established and deemed to be an integral part of the APAC strategy, with an anticipation of significant growth over the coming years.

WHAT YOU'LL DO

We are looking for an FPGA Development Team Lead to hit the ground running as one of the founding members of our Mumbai FPGA & low latency development team, working on Optiver's execution platforms. You'll be focused on achieving best-in-market trade execution on the highly competitive Indian exchanges: NSE, BSE and MCX. But you won't be alone - you'll be backed by a strong collaboration with established FPGA & low latency development teams in Sydney and Shanghai plus gain exposure to the challenges in execution in Optiver's global businesses including in the USA and Europe.

As a leader you will have a strong relationship with internal stakeholders including the trading, risk, compliance, and research teams who will all be collocated with you in the Mumbai office. You'll define the future of our execution platform and execute that vision with your mixed team of FPGA developers and low latency software developers, and through influencing teams in the rest of the Asia Pacific region. You will also be responsible for building that team and growing your developers to reach their potential. As this is a hybrid role, you'll still have the opportunity to be hands-on with some VHDL and C++.

The developers in your team seek out business problems and design innovative solutions, owning their changes end-to-end including understanding the business problem, design, implementation, testing, deployment and monitoring. They are specialists in hybrid FPGA/software system design and consider which parts of the system are in the FPGA or in software.

Our development is often fast paced, fulfilling and rewarding, with the ability to work on features and see them running in production within days.

Other responsibilities include:

• Build and run a high performance mixed FPGA development & low latency software development team, including managing performance, career development and delivery.
• Define the architecture of our ultra low latency trading stack in collaboration with other senior developers.
• Contribute to the vision and strategy for Optiver's Asia Pacific execution capability.
• Implement and/or build solutions to enable our low latency trading and make Optiver number one status in Indian markets.
• Work with stakeholders across the business in a highly collaborative, flat structure.
• Own the automated trading risk of our ultra low latency trading system, defining standards and practices to manage return on risk.

WHO YOU ARE

We need our next FPGA Team Lead to be someone with: 

• 5+ years experience in FPGA development in financial services/capital markets. 
• Experience leading and developing a team. 
• Experience working through the full development lifecycle with responsibilities including gathering requirements, development, testing, deployment, monitoring and ongoing maintenance. You will also have experience leading projects. 
• Proficient in one or more of the following: VHDL, Verilog, SystemVerilog.
• Basic skills in C++ (or something comparable) and Python. 
• An understanding of computer networks and protocols (TCP/IP/UDP). 

WHAT YOU'LL GET

You'll join a culture of collaboration and excellence, where you'll be surrounded by curious thinkers and creative problem solvers. Driven by a passion for continuous improvement, you'll thrive in a supportive, high-performing environment alongside talented colleagues, working collectively to tackle the toughest problems in the financial markets.

In addition, you'll receive:

• Competitive remuneration, including an attractive bonus structure that is unmatched in the industry. We combine our profits across desks, teams and offices into a global profit pool, fostering a truly collaborative environment.
• The opportunity to work alongside diverse, intelligent, and driven peers in a rewarding environment.
• Ownership over initiatives that directly solve business problems.
• Training, mentorship and personal development opportunities
• Competitive benefits
• A work-from-home allowance and support

DIVERSITY AND INCLUSION

Optiver is committed to diversity and inclusion.

We encourage applications from candidates from any and all backgrounds, and we welcome requests for reasonable adjustments during the process to ensure that you can best demonstrate your abilities. Please let us know if you would like to request any reasonable adjustments by contacting the Recruitment team via