RTL - FPGA Design engineer

Job SummaryWe are seeking a talented FPGA RTL Design Engineer to design, implement, and verify digital logic using VHDL/Verilog for FPGA-based systems. The ideal candidate will be responsible for the full FPGA development lifecycle, from architecture design to verification, synthesis, implementation, and lab validation. You'll work closely with system...

Job SummaryWe are seeking a talentedFPGA RTL Design Engineerto design, implement, and verify digital logic using VHDL/Verilog for FPGA-based systems. The ideal candidate will be responsible for the full FPGA development lifecycle, from architecture design to verification, synthesis, implementation, and lab validation. You'll work closely with system...

Job SummaryWe are seeking a talented FPGA RTL Design Engineer to design, implement, and verify digital logic using VHDL/Verilog for FPGA-based systems. The ideal candidate will be responsible for the full FPGA development lifecycle, from architecture design to verification, synthesis, implementation, and lab validation. You’ll work closely with system...

RTL -FPGA Engineers Experience : 2-3 years Location : Hyderabad Experience on Vivado flow or FPGA architecture has decent Vivado flow experience. Interested,please drop your updated resume to

OverviewAzista is a passionate business enterprise with an aim to add value and provide services in various verticals like Food, Medical Devices, Healthcare Products, Aerospace, Innovative Composites, Earth Observatory Satellites. We are renowned manufacturers of healthy food products, Pharma, innovative and cost-efficient composites, Satellites...

RTL Design EngineerExperience : 2-3 yearsLocation : HyderabadKnowledge in RTL Coding in Verilog or VHDLStrong understanding of Logic design, Digital design, System design aspects, FPGA flow, Design Constraints etc.Knowledge in Xilinx FPGA architecture and design flows like IPI, XDC etc.Good Knowledge in Tcl, Python scriptingInterested,please drop your...

RTL Design Engineer Experience : 2-3 years Location : Hyderabad Knowledge in RTL Coding in Verilog or VHDL Strong understanding of Logic design, Digital design, System design aspects, FPGA flow, Design Constraints etc. Knowledge in Xilinx FPGA architecture and design flows like IPI, XDC etc. Good Knowledge in Tcl, Python scripting Interested,please drop...

Company DescriptionAxiado is an AI-enhanced security processor company redefining the control and management of every digital system. The company was founded in 2017, and currently has 150+ employees. At Axiado, developing great technology takes more than talent: it takes amazing people who understand collaboration, respect each other, and go the extra mile...

Company Description Axiado is an AI-enhanced security processor company redefining the control and management of every digital system. The company was founded in 2017, and currently has 150+ employees. At Axiado, developing great technology takes more than talent: it takes amazing people who understand collaboration, respect each other, and go the extra mile...

VHDL/FPGA Design EngineerRTL design, simulation, test bench development & debugging using VHDL.Experience with Xilinx Vivado, timing constraints & synthesis tools.SoC integration, communication protocols & strong HDL debugging skills.