FPGA RTL Design Engineer

Job SummaryWe are seeking a talentedFPGA RTL Design Engineerto design, implement, and verify digital logic using VHDL/Verilog for FPGA-based systems. The ideal candidate will be responsible for the full FPGA development lifecycle, from architecture design to verification, synthesis, implementation, and lab validation. You'll work closely with system...

RTL -FPGA EngineersExperience : 2-3 yearsLocation : HyderabadExperience on Vivado flow or FPGA architecturehas decent Vivado flow experience.Interested,please drop your updated resume to

Company DescriptionAxiado is an AI-enhanced security processor company redefining the control and management of every digital system. The company was founded in 2017, and currently has 150+ employees. At Axiado, developing great technology takes more than talent: it takes amazing people who understand collaboration, respect each other, and go the extra mile...

Company Description Axiado is an AI-enhanced security processor company redefining the control and management of every digital system. The company was founded in 2017, and currently has 150+ employees. At Axiado, developing great technology takes more than talent: it takes amazing people who understand collaboration, respect each other, and go the extra mile...

Job Requirements he RTL Design Engineer is responsible for designing and implementing digital circuits using Hardware Description Languages (HDL) such as Verilog or VHDL.They work on creating logic at the Register Transfer Level (RTL) and collaborate with verification, synthesis, and physical design teams.Key Responsibilities:Understand and analyze design...

Experience: 4 yearsLocation: HyderabadFPGA Design: Develop FPGA designs using hardware description languages (HDLs) such as VHDL or Verilog. Implement and optimize complex digital logic circuits for high-performance applications.Synthesis & Optimization: Perform synthesis, place and route, and optimization of FPGA designs to ensure optimal area, performance,...

Exp: 3 to 15 YrsLocation: Hyderabad / BangaloreThe core skill set expected from the team is:Exceptional Digital fundamentalsHands on experience in System Design with FPGA devices with relevant FPGA EDA toolsExperience in designing and implementing FPGA based solutions in Microchip or Xilinx or Altera FPGAsWrite high quality code in Verilog/System Verilog,...

About UsWe are a dynamic team of young engineers, domain experts, and seasoned sales professionals dedicated to providing comprehensive turnkey solutions for complex challenges in Signal Processing. Our expertise spans the cutting-edge technologies in Signal Processing, addressing critical needs in the Defence and Aerospace sectors. Our offerings encompass a...

Position: RTL Design EngineerExperience: 5 - 8 YearsQualifications: BE/Btech in ECE/EEEResponsibilities -The candidate should have strong RTL design experience.Strong design experience in Ethernet IPs or Ethernet protocol domain.Knowledge in Verilog/VHDL languagesScripting languages: TCL/Perl/Python (any one).Knowledge of AXI Protocols.

Job Title: RTL Design EngineersExp Level: 4+ yrsLoctaion: Hyderabad Job Description:• RTL coding knowledge• Top-level (SOC) level basic industry standard Arch knowledge• SoC & IP level Integration knowledge• IPXACT knowledge• IORING and Phys & GPIOs basic functionality• Design Partitioning(Tilification) knowledge• Design RTL quality...