FPGA RTL Design Engineer

FPGA / RTL Design EngineerLocation: BangaloreExperience: 6+ yearsRole DescriptionAs an FPGA/RTL Design Engineer, you will be responsible for developing RTL modules, FPGA-based systems, and testbenches for verification and validation. This role involves complete ownership from design specification to FPGA implementation, timing closure, and board-level...

1. Job SummaryWe are seeking a talented FPGA RTL Design Engineer to design, implement, and verify digital logic using VHDL/Verilog for FPGA-based systems for RADAR and EW Signal processing applications. The ideal candidate will be responsible for the full FPGA development lifecycle, from architecture design to verification, synthesis, implementation, and lab...

Senior RTL Design Engineer DSP / ASIC / FPGAExperience: 10 to 15 yearsLocation: Bangalore (On-site)Employment Type: Full-time / PermanentAbout the RoleWe are seeking a highly skilled Senior RTL Design Engineer to join our digital design team. The selected candidate will be responsible for the RTL design and development of signal processing pipelines for...

Description : - Position : Lead FPGA Design Engineer - Experience : 8yr - Location : Bangalore - Skill Set : FPGA Design, RTL design, digital design,FPGA development, skilled in SystemVerilog/Verilog, AXI4 protocols,and Xilinx Vivado, with strong expertise in DSP and OFDM-based baseband processing. - Working Days : 5Key Responsibilities : ...

DescriptionPosition : Lead FPGA Design EngineerExperience : 8yrLocation : BangaloreSkill Set : FPGA Design, RTL design, digital design,FPGA development, skilled in SystemVerilog/Verilog, AXI4 protocols,and Xilinx Vivado, with strong expertise in DSP and OFDM-based baseband processing.Working Days : 5Key ResponsibilitiesLead RTL architecture definition,...

Position - Lead FPGA Design EngineerExperience - 8yrLocation- BangaloreSkill Set - FPGA Design, RTL design, digital design,FPGA development, skilled in SystemVerilog/Verilog, AXI4 protocols,and Xilinx Vivado, with strong expertise in DSP and OFDM-based baseband processing.Working Days -5Working Timings - 9 to 6 PMKey Responsibilities:Lead RTL architecture...

FPGA Design EngineerRole Details:Location: BangaloreExperience: 610 YearsAvailability: Immediate Joiners PreferredRTL design (FPGA)Ability to do RTL design using Verilog or SystemVerilog including design assertionsHands on work experience with high end Xilinx FPGA's.Ability to create state machines, data paths, clock domain crossing logic and arbitration...

Lead FPGA Design EngineerJob Location: BangaloreExperience: 10 + yearsJob DescriptionWe are seeking a dynamic and experienced Lead RTL Design Engineer toguide the development of our wireless baseband architecture.Lead the definition and implementation of RTL architectures and participate inthe specification and design of complex communication systems.Oversee...

Job DescriptionAstrome Technologies is at the forefront of developing innovative 5G ready wireless systems that fulfill high bandwidth networking requirements in both rural and urban settings. We are seeking a dynamic and experienced Lead RTL Design Engineer to guide the development of our wireless baseband architecture.Lead the definition and implementation...

Job DescriptionAstrome Technologies is at the forefront of developing innovative 5G ready wireless systems that fulfill high bandwidth networking requirements in both rural and urban settings. We are seeking a dynamic and experienced Lead RTL Design Engineer to guide the development of our wireless baseband architecture.Lead the definition and implementation...