RTL And DV Engineer

LTTS IndiaBangaloreJob DescriptionA DV Engineer, or Design Verification Engineer, is responsible for ensuring the functionality, performance, and reliability of hardware designs, particularly in complex systems like ASICs and SoCs. They work closely with design teams to test designs at various levels, from RTL to full system, and develop test environments to...

Job Requirements Job DescriptionResponsibilities:Complete ownership of IP/subsystem/SOC DV ownership right from spec definition till the post silicon verification and solving the customer issues on need basis. This includes:Active involvement with architecture team during the spec definition phaseVerification strategy definition along with Verification plan...

Role:Design Verification EngineerSkill: DV with GLS ExpNP: Immediate to 30 daysLoc: HYDExp: 3+ yrsRole: Design Verification EngineerSkill: DV-IP with Ethernet/PCIENP: Immediate to 30 daysLoc: HYDExp: 10+ yrsRole:Design Verification EngineerSkill: DV with Soc, GLS ExpNP: Immediate to 30 daysLoc: HYDExp: 3+ yrsRole: Design Verification EngineerSkill: DV with...

Role:Design Verification EngineerSkill: DV with GLS ExpNP: Immediate to 30 daysLoc: HYDExp: 3+ yrsRole: Design Verification EngineerSkill: DV with Soc, Arm ProcessorNP: Immediate to 30 daysLoc: BLRExp: 6+ yrs

We require 1.DV-Formal verification with must Jasper Gold Exp Exp : 5+Location : BLR/Pune2. DV- WIFI/ Wireless / BT with Test case Dev/debuggingExp : 5+Location : BLR/Pune3. DV- PCIE with Test case Dev/debuggingExp : 5+Location : BLR/Pune

Role : DV Senior EngineerExperience : 5–9 years of experienceWork location: BangaloreWork mode: Work from officeInterview process: 1 HR round , 2 Technical roundShould be open for virtual and face to face interview as required by the clientResponsibilities:Implement and debug DV environments and stimuli.Analyze coverage and contribute to test plan...

Summary:Own end-to-end RTL design for complex SoC or large subsystem blocks, from micro-architecture through tapeout and silicon bring-up.Responsibilities:Define micro-architecture from specs; write high-quality synthesizable SystemVerilog/Verilog RTL for SoC-level or large subsystems.Own design bring-up, block/subsystem integration, and close on timing,...

Role: Design Verification EngineerSkill: DV with Soc, Arm ProcessorNP: Immediate to 30 daysLoc: BLRExp: 6+ yrs

SOC RTL Design VerificationExperience: 4 to 10 YearsLocation: BangaloreKey Responsibilities:• Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, good understanding of SOC boot flow, integration level verification• Development and verification of post-si validation sequences using C/C++• Create methodology-based (UVM)...

*Job Area:*Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize,...