RTL Engineer, Dv Engineers

What you'll do:· Own and bring up emulation cutdowns cutdowns for large SoC and IP blocks to improve emulation performance and turnaround time.· Adapt and port test benches to run efficiently on hardware emulation platforms.· Debug and resolve issues related to AVIPs and transactors within the emulation environment.· Lead the bring-up and setup of...

This will be a general RTL Design & DV requirement for SoC Level.Ability to write RTL code for a given Design's microarchitecture independently.RTL Integration of IPs / Subsystems to an SoCRTL quality checks for sign off ( Lint. CDC. Equivalence Checks, Static Power checks)Ability to build Test Benches independently in UVM ( Strong in SV, UVM, Assertions,...

SOC RTL Design VerificationExperience: 4 to 10 YearsLocation: BangaloreKey Responsibilities:• Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, good understanding of SOC boot flow, integration level verification• Development and verification of post-si validation sequences using C/C++• Create methodology-based (UVM)...

General Summary:QCT's Bangalore Wireless R&D(WRD) HW team in Bangalore is looking for experienced Wireless HW design verification engineers to work on Qualcomms best in class chipsets for mobile phones, wearables and IOT . Candidate will be working with ASIC designs on the latest technology nodes. This role will require the candidate to understand and work...

full-chip experience and 10+ years in the following skill areas.Preferred location is  Hyderabad , with  Bangalore  as the secondary option.Skill:Design Verification (DV)Physical Design (PD)Design for Testability (DFT)Register-Transfer-Level (RTL)

Minimum Required Experience : 5 yearsFull TimeSkillsRtl DesignZebuSynopsysPalladiumDescriptionRole: RTL Design Engineer (Zebu/Palladium)Location: BangaloreExp: 5+ YearsNP: Immediate to 20 DaysSkills: RTL, RTL Design, Zebu/Palladium, Synopsys tools.What you'll do:Own and bring up emulation cutdowns cutdowns for large SoC and IP blocks to improve emulation...

Hiring: Design Verification Engineer (HBM Protocol Expertise)Experience: 6+ YearsLocations: Bangalore | Hyderabad | KochiEmployment Type: Full-TimeWe are looking for experienced Design Verification (DV) Engineers with strong hands-on expertise in HBM (High Bandwidth Memory) protocol.Responsibilities :Functional and performance validation of HBM memory...

We are looking for an experiencedSenior RTL Design Leadto join our team in developing cutting-edge control solutions and Application specific SoC products. The ideal candidate will have deep understanding of RTL design and SoC integration, particularly in the context of ARM-based architectures, and a proven ability to collaborate across multiple engineering...

Job Requirements ob TitleDesign Verification EngineerJob DescriptionJob SummaryWe are seeking a talented and detail-oriented Design Verification Engineer to join our core team. As a DV Engineer, you will play a crucial role in ensuring the functional correctness and quality of complex IP blocks and subsystems. This role requires a deep understanding of...

Location : BangaloreExperience : 5 YearsEducation : B.E, M.E, M.Tech, B.TechRole :RTL engineers having experience on STA/SynthesisHands on ownership of Synthesis / Constraints / STA / ECO flow.Expert in running Block level and Chip level STA in MCMM, DMSA environments.Must have worked on multiple timing closure and constraint development for high-speed...