FPGA and RTL Design Engineer

1 day ago

Bengaluru, Karnataka, India Mettlesemi Systems And Technologies Private Limite Full time ₹ 8,00,000 - ₹ 24,00,000 per year

FPGA / RTL Design Engineer

Location: Bangalore

Experience: 6+ years

Role Description

As an FPGA/RTL Design Engineer, you will be responsible for developing RTL modules, FPGA-based systems, and testbenches for verification and validation. This role involves complete ownership from design specification to FPGA implementation, timing closure, and board-level bring-up. You will collaborate closely with ASIC, Firmware, and Validation teams to ensure seamless hardwaresoftware integration and high-quality product delivery.

You will also be involved in system-level design, low-power architecture verification, and FPGA prototyping to support pre-silicon validation and embedded firmware development.

Key Responsibilities

  • Understand system requirements and generate system and RTL design documents.
  • Develop RTL modules and verification testbenches for subsystems and RTL blocks.
  • Implement FPGA design, timing closure, and board-level testing.
  • Deliver test specification documents and define test objectives.
  • Collaborate with cross-functional teams including ASIC, Firmware, and Validation.
  • Lead FPGA lab bring-up and debugging using tools such as JTAG, UART, and logic analyzers.
  • Support hardware-software co-design for pre-silicon validation and firmware integration.
  • Contribute to emulation and FPGA prototyping system design to enhance verification efficiency.
  • Run and debug Conformal Low Power (CLP) checks at various design stages (RTL vs UPF, Gate-level vs UPF).
  • Identify and resolve power intent mismatches, isolation/retention cell errors, and low-power design issues.
  • Collaborate with design, synthesis, and physical design teams for low-power sign-off verification.

Basic Qualifications

  • B.Tech. in Electronics, Electrical, or Computer Science Engineering.
  • Minimum 8 years of experience in FPGA/RTL and test-bench/embedded systems architecture.
  • Proven experience in FPGA system design from IP integration to implementation.
  • Strong skills in Verilog RTL design and Verilog/SystemVerilog testbench development.
  • Experience with AMD Vivado, Vitis SDK, and Vitis AI tools.
  • Proficiency in C/C++ for embedded firmware and Python scripting for automation.
  • Experience with Petalinux build flow, U-Boot, Linux driver modifications, and FPGA SoC debugging.
  • Hands-on experience with Conformal Low Power (CLP) and Fusion Compiler.
  • Multi-disciplinary experience including Firmware, Hardware, and ASIC/FPGA design.

Preferred Qualifications

  • Knowledge of FPGA chip-to-chip interfacing and AMD FPGA architecture.
  • Familiarity with PCIe Gen4/5/6 technologies.
  • Experience with storage systems, protocols, and NAND flash.
  • Strong understanding of low-power design conceptspower domains, isolation, retention, level shifters, power gating, etc.
  • Proven ability to work as part of a global, cross-functional team.

Skills

  • Strong understanding of low-power architecture and power intent verification.
  • Ability to develop a system-level view for complex embedded systems.
  • Excellent analytical, debugging, and problem-solving skills.
  • Strong interpersonal and collaboration skills.
  • Positive "can-do" attitude and self-motivated mindset.

Apply Now: Send your CV to

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