
Principal DFT Engineer
1 week ago
Job Title: PrincipalDFT Engineer
Job Location: Bangalore, India (This position requires a full-time, on-site presence in our Bangalore, India office)
Job ID: AI2436
Job Description:
Key Responsibilities:
- Block-level, Sub-system, and SOC DFT architecture and methodology definition including SCAN, MBIST, IP tests, JTAG.
- Lead DFT architecture and implementation for different sub-systems and full-chip.
- Develop test insertion flow for scan, MBIST, JTAG.
- Estimate and achieve targeted test coverage and ATE test time.
- Develop timing constraints for all DFT modes.
- Drive pre and post silicon test patterns validation and bringup.
- Write scripts in TCL and Perl to achieve productivity enhancements through automation.
Required Background:
- BSEE/MSEE or equivalent degree with 16+ years of experience.
- 8+ years of experience leading complex DFT execution in advanced finFET technology.
- Must have experience in mentoring DFT engineers.
- In-depth knowledge of VLSI design as well as hardware description languages such as Verilog,
- Deep knowledge with EDA tools such as Synopsys Tetramax or Mentor Tessent.
- Good problem solving and debug capabilities is a preferred plus.
- Good knowledge of hardware simulation tools like VCS, Verdi, etc.
- Proficient in scripting languages (C/C++/TCL/Perl/Python).
- Should be proficient at working with cross functional and cross site teams.
- Must possess good communication skills, be a self-driven individual and a good team player.
Personal attributes:
Can-do attitude. Strong team player. Curious, creative, and good at solving problems. Execution and results oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills.
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