sta

STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs. Timing analysis, validation and debug across multiple PVT conditions using Tempus. Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation. Hands-on experience with STA tools - Tempus In-depth knowledge cross-talk noise, Signal Integrity,...

Job DescriptionKey Responsibilities:Timing Analysis & ClosurePerform setup, hold, and skew analysis across Full-Chip, Sub-system, and IP levels.Achieve timing closure by resolving violations and optimizing paths.Constraint DevelopmentDefine and validate timing constraints (clocks, I/O delays, false/multi-cycle paths).Integrate constraints from multiple IPs...

STA Engineer HCL Tech in Bangalore is seeking STA Engineers with a minimum of 2 years of experience. The selection process involves two virtual interview rounds. Candidates with any notice period are welcome to apply. Share your updated resume now.

We are seeking an exceptional STA Engineer to take a key role in our semiconductor designteam. As STA Engineer you will get opportunity to work with talented and passionate STAengineers and create designs that push the envelope on performance, energy efficiency andscalability. you will lead the STA for cutting-edge high speed and complex large ASIC. Youwill...

Job Description:STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs.Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus.Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation.Evaluate multiple timing methodologies/tools on different designs and technology...

Job DescriptionSTA Engineer (5-10 Years)Key ResponsibilitiesResponsible for Multi Voltage domain STA environment setup, execution and timing closureDrive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checksEnsuring timing correlation between PnR STA and timely feedbacks to PD teamGenerating block...

Job DescriptionKEY RESPONSIBILITIES:Responsible for Multi Voltage domain STA environment setup, execution and timing closureDrive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checksEnsuring timing correlation between PnR STA and timely feedbacks to PD teamGenerating block level HS session and using...

Static Timing Analysis (STA) EngineerJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...

Role & responsibilitiesDevelop, validate, and maintain STA constraints (SDC) for multiple design modes and corners (functional, test, scan, BIST, low power, etc.).Own DFT timing constraints (scan shift, capture, at-speed test, boundary scan, MBIST, LBIST, JTAG).Collaborate with DFT and Physical Design teams to ensure test structures meet timing closure...

Job Summary:We are seeking a skilled STA Engineer with a strong background in Test and DFT architectures. The ideal candidate will have hands-on experience evaluating and writing high-quality timing constraints (SDCs) and performing thorough timing checks across complex digital designs.Key Responsibilities:Analyze and validate timing constraints (SDC) for...