Physical Design Lead
5 days ago
Physical Design Lead
KEY RESPONSIBILITIES:
- Manage the team responsible for Synthesis, Physical Design, timing, and Physical closure.
- Oversee a large team of internal and external resources.
- Ensure the completion of the SOC chip on schedule with high quality of results (QOR).
- Handle physical implementation at both block and subsystem levels.
- Contribute to Synthesis, Power Reduction, Timing Convergence, and Floorplan efforts.
PREFERRED EXPERIENCE:
- Proven track record in managing PD teams for complex SOC.
- In-depth understanding of all Physical Design activities for large technology SOC ASIC chips.
- Strong management, technical problem-solving, communication, and presentation skills.
- Team player with effective collaboration skills.
- Experience with Front-End design, DFX, and Physical Design Flows.
- Proficient in various PNR tools: Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk.
- Hands-on experience with 7nm and sub-7nm projects.
- Experience in Full Chip Floorplaning, PNR Partitioning, and Bump Placement is preferred.
- Knowledge of low power and high-performance design.
- Responsible for on-time delivery of block-level layouts with exceptional quality.
- Strong self-driving ability and problem-solving skills.
Education:
- B.Tech / B.E. in Electronics / Telecommunication.
- M.Tech / M.E. in Electronics / Telecommunication.
- Experience: 8+ years
- Notice Period: Immediate to 60 days
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