Physical Design Lead

Eximietas is Hiring – Senior Physical Design Leads / Managers Experience: 10+ Years Locations:Bengaluru, IndiaVisakhapatnam, IndiaSan Jose (Bay Area), USAAustin, USAEligibility (US Roles): Valid H1B or candidates already in the U.S.About the Role:We are looking for highly experienced Senior Physical Design Leads/Managers to collaborate with top-tier...

Hi All,Eximietas Hiring Senior Physical Design Leads/Managers.Experience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.About the jobQualification Required:Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P&R toolsBachelors OR Masters...

Hi All,Eximietas Hiring Senior Physical Design ArchitectsExperience: 10+ Years.Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA.Anyone with a Valid H1B or Already in US.About the jobQualification Required:Typically requires a minimum of 10+ years of experience in Physical Design with mainstream P&R toolsBachelors OR Masters Degree...

Job Description:We are seeking a Physical Design Lead with strong expertise in RTL-to-GDSII flow for advanced technology nodes (7nm and below). The role involves leading SoC/IP physical implementation, driving PPA goals, and ensuring successful tapeouts. You will manage a team, interface with cross-functional groups, and own block/top-level execution.Key...

Position: Physical Design Engineer Location: Bangalore | Ahmedabad | Noida | Pune | Hyderabad Experience: 4–12 YearsRole Overview:Block-level Physical Design from RTL/Netlist to GDSIIPhysical, Timing & Power Signoff at block levelECO generation and closureScripting & automation using Perl, Tcl, Awk, PythonLead Role: Manage a team of 4–6 engineers and...

LTTS is hiring for Physical Design Lead with 7+ years of experience on below JD ::JD for PnR – 7+ ’ experience • IP/Block level PnR activities from Netlist to GDS-II. • Good knowledge of all PnR activities like Floor-planning, Placement, CTS, Routing, Timing closure(STA), signoff checks like FEV, VCLP, EMIR and PV. • Knowledge of industry stanrd E...

Company DescriptionAstrasilica Technologies Private Ltd is a trailblazer dedicated to leveraging semiconductor technology for a better and sustainable world. With core values rooted in innovation, sustainability, and industry transformation, Astrasilica is driving advancements in AI, IoT, and 5G. Our mission is to foster a collaborative and inclusive culture...

Job SummaryWe are seeking a highly experienced Senior Physical Design Engineer with a minimum of 10 years in the RTL to GDSII flow. This role requires hands-on expertise with Cadence Innovus, experience at N3 and below process nodes, and strong scripting and flow debugging skills. Key ResponsibilitiesLead physical design activities from RTL to GDSII,...

Experience: 8+ yearsLocation: BangaloreAbout us: Siplont Systems Pvt ltd is the leading provider of Semiconductor Design services and solutions. Siplont, the innovators in Semiconductor and Embedded Design services – The company aims at helping customers to reduce time to market by providing best technical expertise in the area of semiconductor and...

Role Overview:Job Title : PNR LeadExperience : 8+ YearsWork location : BangaloreJob Description:Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks...