DFT Engineer

1 week ago


Hyderabad, Telangana, India Cyient Full time ₹ 15,00,000 - ₹ 25,00,000 per year
  • Should have worked hands-on ASIC DFT design,

implementation, vector generation/verification, JTAG, boundary scan and simulation.

-Experience with Scan, Compression, ATPG and simulations with Mentor/Synopsys/Cadence tools. Logic BIST knowledge is a plus.

- Should have participated in successful tapeouts ofSoC/ASIC chips at Lower nodes ; 14nm or below and achieved test targets.

- Descent understanding of front-end SoC/ASIC design and implementation including Synthesis and STA.

-Develop/automate flows and scripts in Perl/Tcl to enhance the DFT methodologies & process

-Excellent problem solving and debugging skills. Proactive in nature

  • Excellent Customer interaction, Communication and Team work skills

  • DFT Engineer

    4 days ago


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  • DFT Engineer

    3 weeks ago


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