Sta (Static Time Analysis) & Dft (Design for Test)

3 days ago


Bengaluru Karnataka, India Marutee Design and Engineering Full time

Static Timing Analysis( STA)
- Constraint development - work with RTL team on clock constraint and timing exception. Reading through 3 party IP datasheet and work on timing constraint.
- Partition budgeting - push down from FC level STA and fine tune.
- Timing Model build and checklist for all the mode/corner.
- FC timing convergence include intra and inter partition. Work with PEO on physical optimization.
- Timing ECO including automated flow (tweaker/prime closure) and manual eco tcl, timing eco for checklist

Design For Test(DFT)

DFT Skill set required with below split of 10 DFT CW - preferably with 5-7 yrs of exp.
- 2 CW : Experience with MBIST/Mint flows and methodology
- 3 CW : Experience with SSN architecture/implementation/validation
- 4 CW : Experience with Taplinks/STF/BSCAN implementation/validation
- 1 CW : Experience with Intel Ultibuild/DFTBuild/EDT/MBIST/BSCAN/UPF/H2B flows and methodologie

has context menu

**Job Types**: Full-time, Permanent

Pay: Up to ₹400,000.00 per year

**Benefits**:

- Health insurance
- Provident Fund

Schedule:

- Day shift
- Evening shift
- Fixed shift
- Monday to Friday
- Morning shift
- Rotational shift
- Weekend availability

Supplemental pay types:

- Performance bonus
- Yearly bonus

**Education**:

- Bachelor's (preferred)

**Experience**:

- STA: 3 years (required)
- DFT: 3 years (preferred)

Work Location: In person


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