Static Timing Analysis
3 days ago
Static Timing Analysis (STA) EngineerJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and physical design teams to achieve the target operating frequency and performance metrics. Key ResponsibilitiesTiming Sign-off and AnalysisTiming Closure Ownership: Drive all aspects of timing closure from pre-layout to post-layout for blocks, sub-systems, and/or the full chip.Constraint Management: Develop, validate, and maintain Synopsys Design Constraints (SDC) and timing constraints for all functional and test modes (e.G., Scan, MBIST).MMMC Analysis: Perform comprehensive timing analysis across multiple operating corners (Process, Voltage, Temperature - PVT) and various modes (Multi-Mode Multi-Corner).Critical Path Identification: Analyze timing reports to identify and debug critical paths and resolve all Setup and Hold violations.Signal Integrity (SI) & Noise: Incorporate advanced timing effects such as on-chip variation (OCV), signal integrity (crosstalk), and voltage drop (IR-drop aware STA) into the sign-off process.Methodology and FlowDevelop, maintain, and enhance STA flows and methodologies to improve efficiency, robustness, and reduce analysis runtime.Automate repetitive tasks and report generation using scripting languages.Generate final timing reports and sign-off collateral for tape-out.EducationBachelor's or Master's degree in Electrical Engineering (EE), Electronics Engineering, VLSI, or a related field.Technical Skills & ExperienceExperience: 3+ years of experience in STA.EDA Tools: Expert proficiency with industry-standard Electronic Design Automation (EDA) tools from vendors like Synopsys (e.G., Fusion Compiler, ICC2, Primetime), Cadence (e.G., Innovus), or Mentor Graphics.Soft SkillsExcellent analytical, debugging, and problem-solving skills.Strong verbal and written communication skills.Ability to work effectively in a team environment and collaborate across different engineering disciplines.
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Static Timing Analysis
2 weeks ago
Bengaluru, Greater Noida, India 7rays Semiconductors Full time ₹ 20,00,000 - ₹ 25,00,000 per yearJob DescriptionHand-on experience and Comprehensive knowledge of Static Timing Analysis.Hands-on experience in Logical aware Synthesis, Logical Equivalence check and, Static Timing analysis.Hands-on the DMSA flow to fix pre and post STA timing.Knowledge in the Timing closure on Sub-system level & Block level and Chip level.Knowledge in writing Manual ECOs to...
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Static Timing Analysis
3 weeks ago
Bengaluru, India Eduplex services private limited Full timeStatic Timing Analysis (STA) Lead Location: Bangalore, KAExperience: 7–18 YearsBudget: Up to 30 LPA (DoE)Industry: Semiconductors | ASIC | SoC | AI/Networking ChipsJob Type: Full-Time Job Overview We are seeking a highly skilled Static Timing Analysis (STA) Lead to drive timing closure for large-scale, high-performance ASIC/SoC designs. The ideal candidate...
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Static Timing Analysis
2 weeks ago
Bengaluru, Karnataka, India Eduplex services private limited Full time ₹ 20,00,000 - ₹ 30,00,000 per yearStatic Timing Analysis (STA) LeadLocation: Bangalore, KAExperience: 7–18 YearsBudget: Up to 30 LPA (DoE)Industry: Semiconductors | ASIC | SoC | AI/Networking ChipsJob Type: Full-TimeJob OverviewWe are seeking a highly skilled Static Timing Analysis (STA) Lead to drive timing closure for large-scale, high-performance ASIC/SoC designs. The ideal candidate...
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Vlsi - Static Timing Analysis
4 days ago
Bengaluru, Karnataka, India Cranes Varsity Full time**VLSI - Static Timing Analysis - Freelancers/Consultant Trainer**: **About Cranes Varsity**: Cranes Varsity is a pioneer Technical Training institute turned EdTech Platform offering Technology educational services for over 24 years. Being a trusted partner of over 5000+ reputed Academia, Corporate & Defence Organizations we have successfully trained 1 Lakh+...
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SOC Static Timing Analysis Engineer
3 weeks ago
Bengaluru, India Careernet Full timeKey Skills: Static Timing Analysis,PrimeTime Roles and Responsibilities: Conduct block-level and full-chip static timing analysis across all phases of development. Develop timing methodologies and infrastructure from RTL synthesis to timing closure. Collaborate with architects and designers to define block and chip-level timing constraints. Define analysis...
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SOC Static Timing Analysis Engineer
2 weeks ago
Bengaluru, Karnataka, India Careernet Full time ₹ 15,00,000 - ₹ 25,00,000 per yearKey Skills: Static Timing Analysis,PrimeTimeRoles and Responsibilities:Conduct block-level and full-chip static timing analysis across all phases of development.Develop timing methodologies and infrastructure from RTL synthesis to timing closure.Collaborate with architects and designers to define block and chip-level timing constraints.Define analysis...
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Static Timing Analysis
5 days ago
Bengaluru, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) EngineerJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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Static timing analysis
14 hours ago
Bengaluru, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) EngineerJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (So Cs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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Static Timing Analysis
4 days ago
Bengaluru, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) EngineerJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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Static Timing Analysis
3 days ago
Bengaluru, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) EngineerJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
