Low Power Architect

Bengaluru, Karnataka, India

Category: Engineering Hire Type: Employee

**Job ID** 9800 **Date posted** 02/28/2025

**We Are**:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

**You Are**:
You are a highly motivated and innovative digital design engineer with extensive experience in ASIC design methodology and flows, with a particular emphasis on low power analysis and optimization. You thrive in dynamic environments and are passionate about pushing the boundaries of technology. With a strong background in both digital and physical design, you bring a deep understanding of the underlying concepts of digital design and architecture, physical implementation flows, and timing signoff. You have a proven track record of working with advanced nodes, particularly at 5nm and below, and are adept at developing timing constraints and UPF to meet stringent power, timing, and area targets.

Your expertise in low-power design techniques at RTL and design implementation flow, coupled with your knowledge of SAIF-based analysis, positions you as a leader in the field. You are methodical and possess excellent software and scripting skills (Perl, Tcl, Python), with a solid understanding of CAD automation methods. You are an effective communicator, capable of articulating complex concepts at various levels of abstraction to peers, management, and customers. Autonomous and resilient, you handle interruptions with ease and maintain focus on delivering high-quality results.

**What You’ll Be Doing**:

- Developing and driving digital design methodologies for low power analysis and optimization across IP development teams.
- Collaborating closely with design teams to implement state-of-the-art ASIC design methodologies.
- Working with EDA tools teams to understand and deploy the latest technologies.
- Creating and optimizing RTL designs to achieve the lowest power consumption.
- Conducting SAIF-based analysis and implementing best practices for low power design.
- Developing timing constraints and UPF to meet power, timing, and area targets.

**\The Impact You Will Have**:

- Enhancing the power efficiency of high-performance silicon chips.
- Driving innovation in low power design methodologies.
- Influencing and shaping the methodologies used across multiple IP design teams.
- Contributing to the successful implementation of advanced node technologies.
- Ensuring the delivery of high-quality, low-power silicon IP products.
- Supporting the development of industry-leading mixed-signal products.

**What You’ll Need**:

- MSEE or BSEE with 20+ years of digital design experience.
- 15+ years of digital and/or physical design experience, including hands-on contributions.
- Strong understanding of digital design and architecture, physical implementation flows, and timing signoff.
- Experience with low-power design techniques at RTL and design implementation flow.
- Proficiency with EDA tool flows and advanced node challenges at 5nm and below.
- Expertise in developing timing constraints and UPF for power, timing, and area optimization.
- Excellent software and scripting skills (Perl, Tcl, Python).

**Who You Are**:
You possess excellent organization and communication skills, with the ability to think and communicate at different levels of abstraction. You are methodical, autonomous, and capable of handling interruptions while maintaining focus. Your strong software and scripting skills complement your engineering expertise, allowing you to drive innovation and optimize design processes effectively.

**The Team You’ll Be A Part Of**:
You will be part of the new Digital Methodology Center of Excellence within Synopsys' world-class IP team. This team is dedicated to developing and implementing cutting-edge digital design methodologies that will be used across all IP development teams. You will collaborate with experienced digital and mixed-signal engineers, working on high-end mixed-signal products and contributing to every aspect of the digital design flows.

**Rewards and Benefits**:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.