Asic Power Architect

**Company Description**
At Western Digital, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible.

At our core, Western Digital is a company of problem solvers. People achieve extraordinary things given the right technology. For decades, we’ve been doing just that. Our technology helped people put a man on the moon.

We are a key partner to some of the largest and highest growth organizations in the world. From energizing the most competitive gaming platforms, to enabling systems to make cities safer and cars smarter and more connected, to powering the data centers behind many of the world’s biggest companies and public cloud, Western Digital is fueling a brighter, smarter future.

Binge-watch any shows, use social media or shop online lately? You’ll find Western Digital supporting the storage infrastructure behind many of these platforms. And, that flash memory card that captures and preserves your most precious moments? That’s us, too.

We offer an expansive portfolio of technologies, storage devices and platforms for business and consumers alike. Our data-centric solutions are comprised of the Western Digital®, G-Technology, SanDisk® and WD® brands.

Today’s exceptional challenges require your unique skills. It’s You & Western Digital. Together, we’re the next BIG thing in data.

We are seeking a highly skilled and experienced ASIC Power Architect to join our dynamic team responsible for SoC Architecture of next-generation of Flash Controllers.

As an ASIC Power Architect, you will be responsible for defining Multi Power Domain architectures in SoC, with a particular focus on Low-Power states.

**ESSENTIAL DUTIES AND RESPONSIBILITIES**:

- Power Analysis based on RTL/Netlist including early power estimation based on previous generation architectures.
- Power Optimization techniques at various phases on Design & Development
- Defining Methodologies and Processes for next generation power aware design, development and implementation
- Working closely with and guiding PD implementation from Power optimization perspective
- Characterization process / data analysis with emphasis on Voltage scaling methodologies - SVS / DVFS / DVS and binning
- Leading complex activities while having multiple interfaces
- Collaborate with cross-functional teams to define and refine Power Architecture, ensuring alignment with industry standards and customer needs.
- Working closely with the Design, Verification, DFT and Physical Design teams while guiding them.
- Evaluate all aspects of the ASIC power management from requirements, through definition phase, Design, Verification and to Synthesis, Place and Route, Timing and Power optimizations.

**Qualifications**
REQUIRED:

- BE/BTech in Electronics / Computer Science / Electrical Engineering
- At least 10 years of experience in ASIC Power architecture

**SKILLS**:

- Extensive experience in SoC architecture, Power Management and full ASIC flow.
- Solid understanding of Power Management techniques and Low-Power design principles.
- Physical Understanding on latest Process technologies N7 & N5
- Hands on in Silicon debug of complex power issues
- Proficiency in Low-Power standards like UPF/CPF.
- Working knowledge on UPF based RTL / PGPIN simulations.
- Proficiency in ASIC design tools, simulation methodologies, and hardware description languages (HDLs).
- Excellent analytical and problem-solving skills with a focus on power optimization.
- Strong communication skills and the ability to work effectively in cross-functional teams.

**Additional Information**
All your information will be kept confidential according to EEO guidelines.