SOC Power Architects

3 days ago

Bengaluru, India Samsung Electronics Full time

Position Summary

About Samsung Semiconductor India Research

With a wide range of industry-leading semiconductor solutions, we’re enabling innovative growth in markets segments from hyperscale data centers and automotive to IoT, mobile and consumer electronics.

We develop software for Samsung's technology solutions across different products and our engineers are involved in many of Samsung’s strategic and important projects. SSIR is the largest R&D center outside Korea for Samsung Electronics and we take pride in our ability to work on some of the cutting edge technologies that our parent organization ventures into. Our engineers get to work across diverse domains, projects, products, clients, people and countries, and also conduct research in new and emerging areas of technology. Innovation and creativity are highly valued at SSIR as we strive towards providing high reliability; high performance and value added services that enable Samsung Electronics deliver world class products. Samsung places great emphasis on the creation and protection of Intellectual Property

Role and Responsibilities

Samsung Semiconductor India is hiring SoC Power Architects with 10-15 years’ experience to help define next generation mobile, automotive, and wearable Exynos SoC's.

Role and Responsibilities
- Creating the power architecture and specification for the SoC to achieve low power targets and meet all KPIs
- Setup environment for the RTL level and gate level power analysis at the pre-silicon stage
- Determine tests and benchmarks to run on all IP blocks for pre-silicon power analysis
- Identify areas of improvement at the architecture-level, RTL-level, and during synthesis
- Determine and set power optimization budgets for IP blocks and execute simulations to validate them during the design stage
- Work with industry standard power analysis tools like Power Artist and PrimePower
- Document and communicate results with key SoC development and project management personnel

Skills and Qualifications

Skill Requirements
- Good understanding of clock gating, power-gating, DVFS for power optimization
- Hands on working experience with power definition, estimation, planning, partitioning, analysis, and optimization
- Ability to work in highly competitive consumer SoC designs with strict deadlines and quality standards
- Worked on Lower power designs throughout the SoC development cycle from RTL, to gate-level and post-silicon correlation
- Good understanding of PMIC, Power electronics, digital electronics concepts

Good to have
- Experience with power analysis and power debug tools like PTPX and Power artist
- Good programming and scripting skills using Perl, Python/, and TCL
- Understanding of CPU, GPU, SoC design
- Familiarity with the design flow (synthesis, place & route, power, timing)
- Understanding of UPF based low power verification and defining low power strategies

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