Graduate digital engineer

FPGA Design Engineer We are seeking an RTL FPGA Engineer with a strong background in FPGA design, RTL development, and digital system design. The ideal candidate will have expertise in developing FPGA solutions using VHDL or SystemVerilog , along with solid experience in hardware verification and debugging. This role will involve designing RTL for complex...

Physical Design Engineer - Senior / Lead Strong background in digital IC design , including floorplanning, placement, routing, clock tree synthesis, and optimization. Proficient in Innovus , ICC2 , and Fusion Compiler for place and route, timing closure, and physical design sign-off. Physical Design : Experience in floorplanning, placement, routing, clock...

Experience: 3 - 6 Years Notice period: Immediate Mandatory Experience in Full Chip Timing . Strong background in digital IC design , including floorplanning, placement, routing, clock tree synthesis, and optimization. Proficient in Innovus , ICC2 , and Fusion Compiler for place and route, timing closure, and physical design sign-off. Physical Design :...

SOC RTL Design Verification Experience : 4 to 10 Years Development and verification of post-si validation sequences using C/C++ • Experienced with Verilog, System Verilog, and C or C++ • Candidate past experience requirements, • Should have experience in system-level Verification. • DDR prior experience is not mandatory. ACL Digital, a leader in...

&## ;&## ;&## ;&## ; &## ;&## ;&## ;&## ;&## ;&## ; &## ;&## ;&## ;&## ;&## ;&## ; &## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;&## ;: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding...

ACL Digital is looking for "Senior Design Verification Engineers" Immediate to 30 days Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC. Experience of working on Functional Verification, SoC Verification, Emulation Good in programming : System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language...

Job Title: Digital Marketing Intern Location: Bangalore (On-site – HSR Layout)** Company: Nuwizo Digital Solutions Pvt. Ltd. Duration: 4 Months (Performance-based Extension or Full-time Offer) Stipend: ₹10,000 / month (based on performance & skills) About Nuwizo Digital Nuwizo Digital Solutions Pvt. Ltd. is a fast-growing creative and performance...

JD: Exp: 5+ Years Location: Bangalore Notice period: Immediate Interview mode : F2F Key Responsibilities: Follow-up with BOPS to add Agile PN in SMS as per engineering team's request Creating offering in internal portal as per program mangers request Follow-up with multiple Functional teams to submit order before due date Consolidate requests from all...

Should be able to handle Full chip hashtag Added advantage for #Innovus with Minimum 4 years #PnR (timing/congestion/CTS issues), understanding of hashtag #IO ring, #package support, multi hashtag #voltage design. &## ;Deep understanding of the concepts related to hashtag #synthesis , place & route, hashtag #CTS , timing convergence, IR/EM checks and signoff...

In today's market, there is a unique duality in technology adoption. On one side, extreme focus on cost containment by clients, and on the other, deep motivation to modernize their Digital storefronts to attract more consumers and B2B customers. As a leading Modernization Engineering company, we aim to deliver modernization-driven hypergrowth for our clients...