Digital Design Verification Engineer

ACL Digital is looking for "Senior Design Verification Engineers" Immediate to 30 days Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC. Experience of working on Functional Verification, SoC Verification, Emulation Good in programming : System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language...

SOC RTL Design Verification Experience : 4 to 10 Years Development and verification of post-si validation sequences using C/C++• Experienced with Verilog, System Verilog, and C or C++• Candidate past experience requirements, • Should have experience in system-level Verification. • DDR prior experience is not mandatory. ACL Digital, a leader in...

ACL Digital Hiring for the below requirement Designation: DV engineers Experience: 4 -10+ years Location: Bangalore / Hyderabad Job Description: 1. Hands-on experiences on SV/UVM/Specman 2. Familiarity with formal-based verification 3. Running regression and debugging failures independently 4. Experience in functional and code coverages 5. Independently...

ACL Digital Hiring for the below requirement Designation: DV engineers Experience: 4 -10+ years Location: Bangalore / Hyderabad Job Description: 1. Hands-on experiences on SV/UVM/Specman 2. Familiarity with formal-based verification 3. Running regression and debugging failures independently 4. Experience in functional and code coverages 5. Independently...

Hi All, ACL Digital is hiring #Senior #Design #Verification Engineer! Experience: 4 Years Location: Bangalore / Hyderabad Notice Period: Immediate to 30 Days Preferred! We're seeking experienced professionals ASIC/So C verification. If you have expertise in UVM/System Verilog, proficiency in scripting languages like Python/Perl/TCL, and a strong grasp of...

ACL Digital is looking for "Senior Design Verification Engineers"Immediate to 30 days Experience of working in complex test-bench/model in Verilog, System Verilog or System C. Experience of working on Functional Verification, So C Verification, Emulation Good in programming : System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language...

SOC RTL Design VerificationExperience: 4 to 10 YearsLocation: BangaloreKey Responsibilities:• Verification of SOC RTL (This is a DV Req) : FW-HW co-verification at SOC level, good understanding of SOC boot flow, integration level verification• Development and verification of post-si validation sequences using C/C++• Create methodology-based (UVM)...

ACL Digital Hiring for the below requirement Designation: DV engineers Experience: 4 -10+ years Location: Bangalore / Hyderabad Job Description: 1. Hands-on experiences on SV/UVM/Specman 2. Familiarity with formal-based verification 3. Running regression and debugging failures independently 4. Experience in functional and code coverages 5....

JD: This role requires expertise in PCIe, CPU, Ethernet, CXL, DDR, and RISC-V technologies. Key Responsibilities: Develop and execute verification plans for hardware designs incorporating PCIe, Ethernet, CXL, DDR, and RISC-V technologies. Design and implement verification environments using System Verilog and UVM methodologies. Develop test cases to validate...

Talented and motivated Mid-Level CPU Subsystem Design and Verification Engineer to join our growing team. Responsibilities : Design : Participate in the design of CPU subsystems, collaborating with architects and design engineers. Contribute to micro-architectural decisions, considering performance, power, and area trade-offs. Develop detailed design...