Senior Physical Verification Lead Engineer

Experience of 5+ years in Physical verification and closure. Location: Bangalore NP - Immediate Main responsibility of the candidate will be around achieving a clean GDS view with below key items: Physical Verification closure for Arm CPU implementation: Should have completed multiple tape-outs with Physical Verification closure role in the past...

Experience of 5+ years in Physical verification and closure. Location: BangaloreNP - ImmediateMain responsibility of the candidate will be around achieving a clean GDS view with below key items:Physical Verification closure for Arm CPU implementation:Should have completed multiple tape-outs with Physical Verification closure role in the pastStrong...

BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical DesignDetailed knowledge of EDA tools and flows for power, Ansys Redhawk /Cadence Voltus experience is mustExperience – 6+ years Well versed with the power grid design and power calculation methodologies Role involves tasks in estimating power using industry standard tool , designing power...

Job Title: Lead Physical Design EngineerExperience: 7+ Years Location: Bangalore/Hyderabad Employment Type: Full-time Industry: Semiconductors / ASIC / VLSI / SoC DesignJob Summary:We are seeking a highly experienced and technically strong Lead Physical Design Engineer to drive RTL-to-GDSII implementation for complex SoC or block-level designs. The ideal...

Responsibilities:Leadership:Lead and manage a team of physical design engineers, fostering a collaborative and high-performing work environmentDelegate tasks, provide technical guidance, and mentor junior engineers to ensure their professional developmentMotivate and inspire the team to achieve project goals and deadlinesFoster a culture of continuous...

Job Summary: We are seeking a highly experienced Senior Physical Design Engineer with over 10 years of experience in the RTL to GDS flow. This full-time role will be based in Bangalore Karnataka. The ideal candidate will possess strong scripting skills, have hands-on experience with 3nm, 5nm nodes, and have a proven track record in physical design. Key...

Role Overview: Job Title : PNR Lead Experience : 8+ Years Work location : Bangalore Job Description: Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing...

Role Overview:Job Title : PNR LeadExperience : 8+ YearsWork location : BangaloreJob Description:Technical Skills: Should be able to handle Full chip PnR (timing/congestion/CTS issues), understanding of IO ring, package support, multi voltage design Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks...

Job Summary: We are seeking a highly experienced Senior Physical Design Engineer with over 10 years of experience in the RTL to GDS flow. This full-time role will be based in Bangalore Karnataka. The ideal candidate will possess strong scripting skills, have hands-on experience with 3nm, 5nm nodes, and have a proven track record in physical design.Key...

We’re Hiring | Seniors/Leads/ Managers Design Verification Engineers Are you passionate about IP, Subsystem, and SoC level verification ? Join Mirafra Technologies and be part of an innovative journey in the Semiconductor & VLSI domain , working on cutting-edge projects with a dynamic team! Role: Seniors/Leads/ Managers Design...