Physical verification engineers

Physical Verification EngineerJob DescriptionWork with various implementation team to drive full-chip Physical Verification Sign-off closure in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tape-out.Co-work with Place & Route team to resolve full-chip layout integration issues.Work with various implementation team to drive Physical VerificationCoordinates...

Physical Verification Engineer Experience: 2 to 5 Years Location: Bangalore Notice Period: Immediate Job Description Key Responsibilities: Perform Physical Verification checks including DRC, LVS, ERC , and Antenna checks at block and full-chip level . Work with foundry rule decks (TSMC / Samsung / GF / Intel / UMC etc.) to ensure design sign-off compliance....

Physical Verification EngineersExperience : 2-5 yearsLocation : BangaloreJob Description – Physical Verification EngineerKey ResponsibilitiesPerform physical verification for SoCs, cores, and block-level designs.Run and debug DRC (Design Rule Check), LVS (Layout vs. Schematic), ERC (Electrical Rule Check), Antenna checks, and DFM (Design for...

Experience of 5+ years in Physical verification and closure. Location: Bangalore NP - Immediate Main responsibility of the candidate will be around achieving a clean GDS view with below key items: Physical Verification closure for Arm CPU implementation: Should have completed multiple tape-outs with Physical Verification closure role in the past Strong...

Experience of 5+ years in Physical verification and closure. Location: BangaloreNP - ImmediateMain responsibility of the candidate will be around achieving a clean GDS view with below key items:Physical Verification closure for Arm CPU implementation:Should have completed multiple tape-outs with Physical Verification closure role in the pastStrong...

Experience of 5+ years in Physical verification and closure. Location: Bangalore NP - Immediate Main responsibility of the candidate will be around achieving a clean GDS view with below key items: Physical Verification closure for Arm CPU implementation: Should have completed multiple tape-outs with Physical Verification closure role in the past Strong...

Perform Physical Verification for SoCs, cores, and block-level designs.Run and debug DRC, LVS, ERC, Antenna, and DFM checks.Collaborate with Physical Design (PNR) teams to resolve violations and achieve sign-off.Ensure tape-out readiness by validating design rules and foundry requirements.Work with CAD/methodology teams to enhance verification flows and...

Perform Physical Verification for SoCs, cores, and block-level designs. Run and debug DRC, LVS, ERC, Antenna, and DFM checks. Collaborate with Physical Design (PNR) teams to resolve violations and achieve sign-off. Ensure tape-out readiness by validating design rules and foundry requirements. Work with CAD/methodology teams to enhance verification flows and...

BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical DesignDetailed knowledge of EDA tools and flows for power, Ansys Redhawk /Cadence Voltus experience is mustExperience – 2+ yearsWell versed with the power grid design and power calculation methodologiesRole involves tasks in estimating power using industry standard tool , designing power grid...

BE/BTECH/MTECH in EE/ECE with proven experience in ASIC Physical Design Detailed knowledge of EDA tools and flows for power, Ansys Redhawk /Cadence Voltus experience is must Experience – 2+ years Well versed with the power grid design and power calculation methodologies Role involves tasks in estimating power using industry standard tool , designing power...