DFT Lead Engineer

4 days ago


Bangalore, India 7Rays Semiconductors Full time
The candidate is expected to have clear understanding of IJTAG, P1500 protocols and should have hands on experience of at least one of these.
The candidate should have worked on fault models like stuck-at, Transition Delay Faults(TDF), IDDQ and should have experience in scan test coverage improvement techniques.
He/she should have worked in SoC level DFT with experience in OCC/OPCG insertion, EDT/Compression logic insertion, clock module handling for scan purposes and post-silicon bring-up and /or production activities with exposure to Tester debug usings shmoo plots and graphs.
The candidate should have experience of providing test mode timing constraints to STA and PD teams.
Good communication skills and debugging skills are a must to have qualities for this role as it involves cross-functional teams and customer teams communications along with internal DFT team leading and mentoring of DFT Engineers.
Good to have skills - DFT architecture and implementation knowledge of chiplet based implementations

7Rays Semiconductors Private Ltd. is a provider of end to end custom SoC design solutions ranging from SoC Architecture, RTL design, Design verification, DFT, Physical Design & Analog design. We are focused on providing services to top semiconductor and system companies to help them with the design of their complex SoCs
.We work closely with our clients, building effective partnerships to deliver high-quality solutions tailored to their needs. With a strong engineering team and a proven track record of successful project executions, we are committed to excellence and innovation in SoC Design, Development, and deployment of customers’ products
.
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