Physical Design Engineer

19 hours ago


Bangalore, India ACL Digital Full time

Experience: 3 - 6 Years

Notice period: Immediate

Location: Bangalore & Hyderabad

Responsibilities

  • Mandatory Experience in Full Chip Timing .
  • Strong background in digital IC design , including floorplanning, placement, routing, clock tree synthesis, and optimization.
  • Tools Expertise : Proficient in Innovus , ICC2 , and Fusion Compiler for place and route, timing closure, and physical design sign-off.
  • Physical Design : Experience in floorplanning, placement, routing, clock tree synthesis (CTS), and static timing analysis (STA).
  • Optimization : Focus on power , performance , and area (PPA) optimization.
  • Sign-off : Conduct DRC , LVS , and parasitic extraction for clean designs.
  • Advanced Process Nodes : Experience with 7nm , 5nm , or lower process nodes.
  • Cross-functional Collaboration : Work closely with design, verification, and manufacturing teams.
  • Tape-out : Drive tape-out process and ensure high-quality designs.
  • Qualifications : Bachelor’s or Master’s degree in Electrical Engineering, with 4+ years of experience.
  • Preferred : Experience with DFM , DFT , and advanced packaging technologies.


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