
DFT Lead
1 day ago
Key skills with hand on: DFT, MBIST, Scan Insertion, ATPG, Full Chip ,SOC ,VLSI Experience: 5 - 25 years Work Location: Trivandrum, Bangalore, Hyderabad, Chennai, Pune Education: Engineering (excluding Mechanical/Civil) Detailed JD: 5+ years' experience in ASIC/DFT - simulation and Silicon validation, •Should have worked in at least one Full chip DFT •Experience with any of these tools is required: ATPG - TestKompress, MBIST - MentorETVerify, Simulation - VCS (preferred), ModelSim
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Dft- sr. lead
4 days ago
Bangalore, India HCLTech Full timeDesign for Testability (DFT) Engineer (Senior Level - 10+ years’ experience) Job Summary: We are seeking a highly accomplished Design for Testability (DFT) Engineer to join our elite team and lead the DFT efforts for our most critical ASIC and So C projects. This senior-level position demands a mastery of DFT methodologies and the ability to drive the...
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DFT- Sr. Lead
1 day ago
bangalore, India HCLTech Full timeDesign for Testability (DFT) Engineer (Senior Level - 10+ years’ experience) Job Summary: We are seeking a highly accomplished Design for Testability (DFT) Engineer to join our elite team and lead the DFT efforts for our most critical ASIC and SoC projects. This senior-level position demands a mastery of DFT methodologies and the ability to drive the...
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DFT Lead
2 weeks ago
Bangalore, India LeadSoc Technologies Pvt Ltd Full timeLead Soc is hiring DFT Leaders! Hands on experience working in DFT with scan insertion. Good communication and analytical skills and Team handling. Experience: 9 years to 20 years Location: Bangalore Please share your profile to jhansi.bv@leadsoc.com for further discussion
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DFT- Sr. Lead
4 days ago
bangalore, India HCLTech Full timeDesign for Testability (DFT) Engineer (Senior Level - 10+ years’ experience)Job Summary:We are seeking a highly accomplished Design for Testability (DFT) Engineer to join our elite team and lead the DFT efforts for our most critical ASIC and SoC projects. This senior-level position demands a mastery of DFT methodologies and the ability to drive the...
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Lead DFT Engineer
15 hours ago
bangalore, India ACL Digital Full timeJob Title: Lead DFT EngineerExperience: 7+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / ASIC / SoC DesignJob Summary:We are looking for a Lead DFT Engineer to drive DFT architecture, planning, and implementation across complex SoC/ASIC designs. As a technical leader, you will mentor junior engineers, collaborate with...
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Lead DFT Engineer
1 day ago
bangalore, India Tech Mahindra Full timeOpen position:- Lead DFT Engineer Experience: - 7+ years Location:- Bangalore NP: - Immediate to 15 days JD: - 1. Experience with DFT tools such as Synopsys DFT Compiler, Test Kompress and Xelium. 2. Minimum 7+ years of experience in DFT engineering, with a focus on Scan Insertion and ATPG, ICL, SSN 3. Strong knowledge of DFT techniques such as Scan Chains,...
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DFT Lead
3 days ago
bangalore, India Tech Mahindra Full timeHi Tech Mahindra hiring DFT Engineers for Bangalore location. Exp: 9-14yrs Location: Bangalore NP: 0-45days JD: 1. Experience with DFT tools such as Synopsys DFT Compiler, TestKompress and Xelium 2. 7+ years of experience in DFT engineering, with a focus on Scan Insertion and ATPG, ICL, SSN 3. Strong knowledge of DFT techniques such as Scan Chains, ATPG,...
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Lead DFT Engineer
1 week ago
bangalore, India ACL Digital Full timeJob Title: Lead DFT Engineer Experience: 7+ Years Location: Bangalore Employment Type: Full-time Industry: Semiconductors / ASIC / SoC Design Job Summary: We are looking for a Lead DFT Engineer to drive DFT architecture, planning, and implementation across complex SoC/ASIC designs. As a technical leader, you will mentor junior engineers,...
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DFT Lead Engineer
1 day ago
Bangalore, India ACL Digital Full timeDFT Lead : Work Location - Bangalore Experience - 7+ Years Desired Skills and Experience – · 7+ years of experience/concept on all aspects of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan. · DFT logic integration and verification. · Experience in debugging low coverage and DRC fixes · Gate Level ATPG simulation with and without timing. · Pattern...
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Dft lead engineer
2 weeks ago
Bangalore, India ACL Digital Full timeDFT Lead : Work Location - Bangalore Experience - 7+ Years Desired Skills and Experience –· 7+ years of experience/concept on all aspects of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan. · DFT logic integration and verification. · Experience in debugging low coverage and DRC fixes · Gate Level ATPG simulation with and without timing. · Pattern...