STA Specialist

Job OpportunityWe are seeking a highly skilled Senior STA Specialist to lead our static timing analysis team. The ideal candidate will have expertise in developing and implementing STA methodologies and tools to ensure timely delivery of complex IC designs.Leverage your knowledge of prime-time constraint development to drive full-chip level optimization and...

Job TitleA Senior Timing Closure Specialist is required to drive multi-voltage domain setup, execution and timing closure ensuring quality handoff for STA checks.Key Responsibilities:Set up, execute and close multi-voltage domain environment for STA checks.Drive pre-route timing checks and QoR cleanup eliminating SDC issues.Ensure timing correlation between...

Are you a timing analysis expert seeking a new challenge? This role involves leading the setup, hold, and skew analysis for our projects, ensuring timely delivery. Your primary responsibility will be to perform STA across Full-Chip, Sub-system, and IP levels, achieving timing closure by resolving violations and optimizing paths.Key ResponsibilitiesTiming...

STA Engineer for Complex SoC DesignsWe are seeking a skilled Static Timing Analysis (STA) Engineer to own and drive timing closure for complex System-on-Chip (SoC) designs across multiple technology nodes.Owning and driving timing closure for complex SoC and ASIC designsPerforming full-chip and block-level timing analysis using industry-standard...

Job Title: Synthesis Design SpecialistJob Description: We are seeking a skilled Synthesis Design Specialist to join our team. The successful candidate will be responsible for designing and implementing high-performance digital systems using advanced synthesis techniques.Key Responsibilities: 1. Design and implement digital systems using synthesis tools and...

Job OpportunityWe are seeking an accomplished Static Timing Analysis (STA) engineer to spearhead our efforts in achieving first-pass silicon success for cutting-edge AI and RISC-V SoCs.This role entails leading timing closure initiatives across block and full-chip levels, collaborating closely with physical design, RTL, and verification teams across multiple...

**Synthesis Design Engineer Role Overview:**The primary responsibility of this position is to execute the front-end implementation of sub-blocks or IPs.This involves ownership of synthesis, LEC, CLP, prelayout STA, and postlayout STA/timing closure. Collaborate with design teams and PNR teams to achieve these goals.Key Responsibilities:Responsible for...

Front-end Integration SpecialistThe role of a Front-end Integration Specialist is to oversee the implementation of front-end designs from RTL (Register-Transfer Level) to netlist. This involves working closely with designers and architects to ensure that the design meets the required specifications.Implement front-end designs from RTL to netlist, including...

Job Title: SOC/ Fullchip STA EngineerWe are seeking a highly skilled and experienced engineer to join our team in the field of full-chip Static Timing Analysis (STA) engineering. The ideal candidate will have a strong background in electronic design automation (EDA) tools, particularly Genus and Design Compiler, as well as experience with floorplanning-based...

Key Responsibilities:Develop front-end implementation from RTL to netlist, incorporating RTL Lint, CDC/RDC analysis, timing constraints, Power Analysis, and STA for Multi-Media IPs.Perform Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for Timing, Area, and Power.Run Formal Verification checks...