STA Expert

2 days ago

Bengaluru, Karnataka, India beBeeTechnical Full time ₹ 18,00,000 - ₹ 24,00,000

Are you a timing analysis expert seeking a new challenge? This role involves leading the setup, hold, and skew analysis for our projects, ensuring timely delivery. Your primary responsibility will be to perform STA across Full-Chip, Sub-system, and IP levels, achieving timing closure by resolving violations and optimizing paths.

Key Responsibilities
  • Timing Analysis & Closure

- Conduct comprehensive setup, hold, and skew analysis across Full-Chip, Sub-system, and IP levels.
- Achieve timing closure by resolving violations and optimizing paths.

  • Constraint Development

- Define and validate timing constraints (clocks, I/O delays, false/multi-cycle paths).
- Integrate constraints from multiple IPs for hierarchical STA.

  • Tool Usage & Flow Integration

- Utilize STA tools like Synopsys PrimeTime, Cadence Tempus, or equivalent.
- Integrate STA into the overall design flow and automate processes for efficiency.

Job Requirements:

- Provide expert guidance on STA methodologies, including setup and hold time analysis, clock domain crossing, and multi-cycle paths for Full Chip, Sub-system, and complex IP timing closure.
- Develop and implement timing constraints from scratch such as clock definitions, input/output delays, and path constraints for Full-Chip, Sub-system to ensure accurate timing analysis.
- Collaborate with cross-functional teams to integrate existing timing constraints from various IPs for Full-Chip/Sub-system timing analysis.
- Possess deep knowledge of STA tools (such as Synopsys PrimeTime, Cadence Tempus, or Mentor Graphics' ModelSim) including their capabilities, limitations, and best practices.
- Guide the integration of STA tools into the overall design flow, ensuring compatibility and optimal performance.
- Oversee the process of achieving timing closure, addressing any timing violations and guiding optimizations to meet performance goals.

Primary Skills
  • Deep Technical Knowledge:

- In-depth understanding of STA concepts, EDA tools, and methodologies.
- Experience in timing constraints development, timing closure for Full-Chip/Sub-system to meet the design performance.

  • Problem-Solving Skills:

- Strong analytical and problem-solving abilities to tackle complex timing issues.

  • Communication Skills:

- Ability to communicate complex technical concepts effectively to various stakeholders.

  • Leadership and Mentoring:

- Experience in leading teams and mentoring less experienced engineers in STA practices

Secondary Skills
  • Design flow management

- Able to improve the execution efficiency through flow automation and other value adds

  • Cross functional co-ordination

- Work closely with other teams, such as RTL design, Physical design, design verification, and manufacturing, to ensure seamless timing closure of physical design.

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