Senior DFT Architect

6 hours ago


Shimoga, Karnataka, India beBeeDftEngineer Full time ₹ 1,50,30,300 - ₹ 2,15,43,850
Job Opportunity:

As a leader in Digital Fault Tolerance (DFT) engineering, you will be responsible for the development and implementation of advanced DFT architectures with a focus on Multi-Bit Signature Testing (MBIST) for cutting-edge System-on-Chip (SoC) designs.

Key to your success will be the integration of MBIST Intellectual Property (IP), generation of test insertion and verification infrastructure, and work on DFT planning, insertion, simulation, and pattern generation.

You will perform Automatic Test Pattern Generation (ATPG) and MBIST pattern generation, as well as debug failures from silicon bring-up. Collaboration with RTL, Physical Design, and Verification teams throughout the design cycle is essential.

Achieving high coverage and test quality in scan and MBIST will also be critical. This role requires strong analytical and problem-solving skills, with the ability to work independently and effectively contribute to cross-functional team efforts.

Some key requirements of this position include:

  • Developing and implementing DFT architecture with a focus on MBIST for advanced SoCs.
  • Integrating MBIST IPs, generating test insertion and verification infrastructure.
  • Working on DFT planning, insertion, simulation, and pattern generation.
  • Performing ATPG and MBIST pattern generation and debugging failures from silicon bring-up.
  • Collaborating with RTL, Physical Design, and Verification teams throughout the design cycle.
  • Achieving high coverage and test quality in scan and MBIST.


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