DFT Verification Specialist

Digital Fault Tolerance EngineerThe Role:We seek a seasoned DFT engineer to spearhead the verification of digital fault tolerance features.Key Responsibilities:Design and implement verification environments for DFT features using Verilog, SystemVerilog (SV), SVA, UVM, and C++.Develop and maintain advanced debugging skills using Verdi and other debugging...

Role Overview:">">The main focus of this position is to design, develop, and execute DFT verification strategies for advanced CPU cores.">">Key Responsibilities:">">Develop and implement comprehensive pre-silicon verification test plans for DFT features in next-generation CPU Cores.">Design and execute directed and random verification tests to thoroughly...

Job DescriptionJob Description:We are looking for a skilled DFT Verification Engineer with hands-on experience in DDR IP or subsystem-level verification to join our growing team in Bangalore. The ideal candidate will be responsible for generating silicon test patterns for DDR interfaces using JTAG and performing thorough gate-level simulations for...

Dear DFT Experts, are you ready to take your career to the next level with cutting-edge DDR validation projects?Job Title: DFT Verification Engineer DDR & GLS FocusLocation: BangaloreNotice Period: Immediate to 30 DaysJob Overview:We're hiring experienced DFT Verification Engineers (4–14 years) who are passionate about DDR IP/subsystem testing and...

Hello All,Greetings from ACL Digital,We are looking for "DFT Verification Engineers". Exp Level:3 to 6yrsLocation: BangaloreNotice period: Immediate joiners are preferredJob description:What are the responsibilities in this role?Develop and execute pre-silicon verification test plans for DFT features of the chip. Develop directed and random verification...

What are the responsibilities in this role?• Develop and execute pre-silicon verification test plans for DFT features of the chip.Develop directed and random verification tests to validate the functionality.• Verify DFT design blocks and subsystems (such as MBIST, high speed IO PHY, fuse, clocks, reset) using complex SV or C++ verification...

What are the responsibilities in this role? • Develop and execute pre-silicon verification test plans for DFT features of the chip. Develop directed and random verification tests to validate the functionality. • Verify DFT design blocks and subsystems (such as MBIST, high speed IO PHY, fuse, clocks, reset) using complex SV or C++ verification...

What are the responsibilities in this role?Develop and execute pre-silicon verification test plans for DFT features of the chip. Develop directed and random verification tests to validate the functionality.Verify DFT design blocks and subsystems (such as MBIST, high speed IO PHY, fuse, clocks, reset) using complex SV or C++ verification environments. ...

Job DescriptionYou have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.KEY...

Job Title: Senior DFT Verification Engineer Role Overview:The ideal candidate will be responsible for verifying DDR IP/subsystems using pattern-based testing methodologies. This involves generating and validating JTAG-based test patterns specifically for DDR interfaces using industry-standard tools and flows.Key Responsibilities:Verify DDR IP/subsystems...