DFT Verification Specialist

3 days ago


Bengaluru, Karnataka, India beBeeDigitalFaultTolerance Full time ₹ 20,00,000 - ₹ 25,00,000
Digital Fault Tolerance Engineer

The Role:

We seek a seasoned DFT engineer to spearhead the verification of digital fault tolerance features.

Key Responsibilities:
  • Design and implement verification environments for DFT features using Verilog, SystemVerilog (SV), SVA, UVM, and C++.
  • Develop and maintain advanced debugging skills using Verdi and other debugging tools.
  • Work with EDA simulation tools such as Synopsys VCS and Cadence NCSIM to simulate and verify digital circuits.
  • Utilize scripting languages like Tcl/Perl/Ruby/Python to automate testing and verification tasks.
  • Maintain a working knowledge of Unix/Linux OS and file version control systems.
Requirements:
  • 3-6 years of experience in DFT feature verification, including JTAG, MBIST, SCAN, fuse, and IO-PHY loopback testing.
  • Strong background in Verilog, SV, SVA, UVM, and C++ programming languages.
  • Excellent analytical and problem-solving skills, with attention to detail.
  • Familiarity with STA Constraints for various DFT modes.
  • Excellent written and verbal communication skills.
  • Experience with ATE debug, synthesis, formal/LEC, or power analysis is a plus.
Deliverables:
  • Verification methodologies for digital fault tolerance features.
  • Debugged and optimized code.


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