Senior ASIC Physical Design Engineer

7 days ago


Bengaluru, Karnataka, India Cadence System Design and Analysis Full time

We are seeking a dedicated and innovative engineer who is fascinated by the world of ASIC physical design. At Cadence System Design and Analysis, we pride ourselves on delivering cutting-edge solutions to our customers.

Key Responsibilities
  • Work on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm.
  • Take ownership of one or more physical design blocks, including floorplan, CTS, PNR, QRC, STA, PV & IR.
  • Contribute to design methodology and flow automation.
  • Innovate and implement Power, Performance, and Area optimization techniques.
  • Participate in IP release to customers and support team on standardizing and documenting learnings.
Requirements
  • Bachelor's degree in Electronics or equivalent practical experience.
  • Experience and in-depth knowledge on Netlist-GDS physical design.
  • Experience on sub-7nm tech nodes.
  • Good hands-on experience on scripting tcl & python.


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