
Principal Engineering Manager
3 days ago
We are seeking a skilled Senior Physical Design Engineer to drive the success of our projects. The ideal candidate should possess extensive experience in top-level floor planning, placement, partitioning, and related technical skills.
The selected candidate will be responsible for:
- Providing technical guidance and mentoring to junior engineers.
- Interfacing with front-end design teams to resolve complex issues.
- Designing low power circuits using techniques such as voltage islands, power gating, and substrate-bias.
The ideal candidate should have:
- A strong background in ASIC physical design, including floor planning, P&R, extraction, IR Drop Analysis, timing, and signal integrity closure.
- Extensive experience and detailed knowledge in Cadence or Synopsys or Magma physical design tools.
- Expertise in scripting languages such as PERL or TCL.
- Strong physical verification skills.
- Ability to work effectively in a team environment.
Requirements:
- 4-12 years of experience in physical design engineering.
- Excellent communication and problem-solving skills.
- Good written and oral communication skills, with ability to clearly document plans.
Key Skills:
- Top-level floor planning
- Partitioning
- Placement
- Scan-chain-reordering
- Clock tree synthesis
- Timing optimization
- SI aware routing
- Timing analysis/closure
- ECO tasks (timing and functional ECOs)
- SI closure
- Design rule checks (DRC)
- Logical vs. Schematic (LVS) checks
- Antenna checks
- Voltage Islands
- Power Gating
- Substrate-bias
Location: Amravati, India
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