
Senior IC Designer
2 days ago
Key Responsibilities:
- Develop and implement pre/post-layout constraint development to ensure timing closure.
- Collaborate with the design team to develop functional and DFT constraints, driving innovation in IC design.
- Integrate IP-level constraints and define multi-voltage/switching-aware corner definitions, ensuring optimal performance.
- Gain expertise in RC/C model selection and abstraction techniques like Hyperscale, ILM, ETM, enhancing your skill set.
- Analyze and optimize RC balancing and scaling of full chip clock and critical data paths, delivering high-quality results.
Requirements:
- A bachelor's degree in Electrical Engineering or Computer Science with a proven track record in ASIC Physical Design.
- Detailed knowledge of EDA tools and flows, including Tempus and Primetime, is essential for success in this role.
- Minimum 7 years of experience in the field of IC design and physical verification.
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