
Lead ASIC Timing Closure Specialist
7 days ago
Job Title:
Synthesis and Static Timing Analysis Specialist
At Eteros Technologies, you will be part of a highly talented team working on advanced mixed signal chip design.
- Key Responsibilities:
- Full chip and block level timing closure ownership throughout the project cycle
- Developing and maintaining methodology and flows related to timing verification and closure
- Generation of block and full chip timing constraints
- Analysis of timing reports using scripting techniques
- Required Skills and Qualifications:
- BTech/MTech/PhD degree with at least 6+ years of hands-on experience in ASIC timing constraints generation and timing closure
- Proficiency in scripting languages (Tcl and Perl)
- Benefits:
- Medical benefits
- Continuous learning and professional advancement opportunities
- What We Offer:
- Dynamic environment that offers competitive salary and more
- Opportunities for growth and development within a leading edge technology company
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