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Advanced Chip Design Manager
2 weeks ago
Job Overview:
We are seeking a highly skilled Staff Design Engineer/Design Manager to lead our development team. This role entails responsibility for synthesis, static timing, and DFT efforts for an advanced mixed-signal chip.
- Full chip and block level timing closure ownership throughout the project cycle (RTL, synthesis, and physical implementation).
- Methodology and flow development related to timing verification and closure.
- Block and full chip timing constraint generation.
- Timing report analysis and scripting techniques application to drive rapid timing closure.
Key Responsibilities Include:
Digital chip integration work support and leading the team to timely project delivery with high-quality results.
Efficient methodologies development to ensure successful project outcomes.
Essential Qualifications:
A BTech/MTech/PhD degree with at least 6+ years of hands-on experience in ASIC timing constraints generation and timing closure. Expertise in STA tools (Tempus and Primetime) and methodologies for timing closure with a good understanding of OCV, noise, and crosstalk effects on timing. Familiarity with all aspects of timing closure of high-performance, mixed-signal SoCs in advanced finFET technology nodes, preferably 7nm.