Chief Architect

Silicon Labs is a leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world's most highly integrated SoCs, Silicon Labs provides device makers with solutions, support, and ecosystems needed to create advanced edge connectivity applications.

This position involves developing complex SoC/chip architectures with multi-core, multi-threaded processor subsystems, AI accelerators, interconnects, memory architecture and multi-level caches, multiple clocks and resets, high-speed interfaces, peripherals.

The chosen candidate would need to contribute to, and manage a team for, the development of architecture, microarchitecture, and design of SoCs which include RISC-V, ARM or proprietary processor designs, and high-speed interfaces for off-chip memories, along with the integration of wireless systems, power management, and mixed signal IP.

Key Responsibilities:

• Lead the development and execution of Wireless SoC's from definition, through execution, and into production
• Definition and Planning
• Coordinate with product marketing teams to develop the SoC requirements. Provide necessary design collateral to support the product approval gates.
• Develop and maintain the SoC architecture or technical specification to meet the product requirements, with a key goal to maximize IP reuse.
• Develop the design schedule, including milestones and resource requirements. Coordinate with cross-functional teams (such as software) on dependencies.
• Project Execution
• Coordinate with global design functional leads (RF, baseband, verification, etc) to track execution, triage issues, and perform prudent escalation.
• Represent the design community to provide succinct weekly status and attend the cross-functional meeting. Drive design action items to closure.
• Perform SoC Design Integration and maintain design collateral such as documentation, register libraries, and pinouts delivered to cross-functional teams.
• Follow established quality procedures and processes to achieve first tapeout.
• Validation to Production
• Actively support the validation and product test teams during silicon bringup, validation, characterization, and qualification.
• Triage, track, and resolve issues reported during silicon evaluation. Execute a metal or full layer revision, if necessary.

Qualifications:

• Capable of leading complex IP, SOC development projects execution. Experience coordinating with contractors a plus.
• Top-down planning and execution of SOC projects.
• Experience in full-chip development cycle
• Able to build strong technical team.
• Hands-on experience in architecture, micro-architecture, digital design processes
• Knowledge of high-speed interfaces like USB, PCIe, Ethernet, Mobile DDR, Quad/Octa-SPI
• Knowledge of peripheral interfaces like SDIO, UART, I2S, I2C, PWM, CAN, etc.
• Knowledge of processors like RISC-V and ARM processors
• Knowledge of design signoff flows including Lint, CDC, Formal Verification, Synthesis, Constraints and STA Timing Closure
• Knowledge of DFT including Scan, ATPG, MBIST
• Knowledge of low power design methodology (static/dynamic clock gating, power gating, dynamic voltage and frequency scaling)
• Knowledge of hardware accelerators
• Knowledge of Verilog and System Verilog
• Knowledge of scripting languages like Perl, Python, Tcl, shell

Benefits & Perks :

• Equity Rewards (RSUs)
• Employee Stock Purchase Plan (ESPP)
• Insurance plans with Outpatient cover
• National Pension Scheme (NPS)
• Flexible work policy
• Childcare support

Our Company Values:

We strive for good work/life balance and to make our environment welcoming and fun.