
High-Level Memory Design Specialist
3 days ago
We are seeking a highly skilled Memory Design Engineer to join our team.
The ideal candidate will have hands-on experience with SRAM design, characterization, layout design, net-listers, and complete verification at the compiler level.
A good understanding of different memory architectures, expertise in working with SRAM leaf cells from scratch to top-level integration, and proficiency in various physical verification flows are essential.
Key responsibilities include creating detailed and optimized physical layouts for memory cells, arrays, and peripheral circuits using tools like Cadence Virtuoso or Synopsys Custom Compiler.
The successful candidate will have experience working on advanced nodes (TSMC: 7nm/5nm/3nm), FinFET architecture, and challenges such as variability and manufacturability.
Additional requirements include familiarity with Caliber Physical Verification flow and Synopsys Custom Compiler.
Requirements:- 8+ years of experience in full custom memory design and architectures
- Hands-on experience with SRAM design, characterization, layout design, net-listers, and complete verification at the compiler level
- Good understanding of different memory architectures
- Expertise in working with SRAM leaf cells from scratch to top-level integration
- Proficiency in various physical verification flows
- Familiarity with Cadence Virtuoso layout editor and Caliber Physical Verification flow
- Experience working on advanced nodes (TSMC: 7nm/5nm/3nm), FinFET architecture
The successful candidate will be part of a dynamic team and have the opportunity to work on challenging projects.
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