
Lead Designer of High-Performance Memory Solutions
1 week ago
A key aspect of this Senior Memory Design Lead Engineer position is to create innovative memory compilers and Fast Cache instances for the next generation Cores. The goal is to achieve superior Power, Performance, and Area (PPA) metrics.
Key Responsibilities:
- Developing advanced memory designs using computer architecture principles
- Designing high-speed and low-power CMOS circuitry, including clocking schemes and Static logic circuits
- Optimizing power consumption versus performance and area trade-offs in typical CMOS design
- Maintaining a professional demeanor and passion for circuit design
Required Skills and Experience:
- Understanding of computer architecture concepts
- Basic knowledge of CMOS Transistors and their behaviors
- Minimum 8+ years of experience in SRAM/memory design margin, char, and related quality checks
Nice to Have Skills and Experience:
- Knowledge of basic scripting languages
- Experience working with Cadence or Synopsys flows
- Experience with circuit simulation and optimization of standard cells
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