Senior ASIC/RTL/Logic Design Engineer

ASIC RTL Design EngineerJob Description:Exp: 5 to 8 yrsLocation: Hyderabad- Good knowledge on the digital concepts and ASIC flow- Experience in RTL coding is a must.- Must have hands on experience with SoC design and integration.- Experience in Verilog/System-Verilog is a must.- knowledge of AMBA protocols - AXI, AHB, APB- Basic knowledge on verification-...

ASIC RTL Design EngineerJob Description:Exp: 5 to 8 yrsLocation: HyderabadGood knowledge on the digital concepts and ASIC flowExperience in RTL coding is a must.Must have hands on experience with SoC design and integration.Experience in Verilog/System-Verilog is a must.knowledge of AMBA protocols - AXI, AHB, APBBasic knowledge on verificationUnderstanding of...

Job DescriptionThis role is for an IP / SoC RTL Senior / Lead Design Engineer to be responsible for the development and integration of IP and sub-systems. The ideal candidate will have strong expertise in logic design, RTL coding, and ASIC development, with a focus on creating high-performance, complex digital designs.Responsibilities- Responsible for IP /...

Job Description- Experience in Logic design / RTL coding is a must.- Experience is SoC design and integration for complex SoCs is a must.- Experience in Verilog/System-Verilog is a must.- Experience in Multi Clock designs, Asynchronous interface is a must.- Experience in using the tools in ASIC development such as Lint and CDC.- Experience in Synthesis /...

We HCL are seeking a highly motivated RTL Design Engineer with 7-12 years of experience to join our growing team. You will play a vital role in the design and development of complex digital logic for next-generation integrated circuits (ICs). This position offers the opportunity to work on challenging projects while utilizing your expertise in RTL design...

About the Role :We are seeking a highly skilled Senior SoC RTL Design Engineer to join our silicon design team. In this role, you will lead the RTL design and micro-architecture development of complex SoC (System-on-Chip) components for cutting-edge semiconductor products.You will be responsible for driving architecture discussions, writing and reviewing RTL...

Senior RTL Design EngineersExperience : 3-5 yearsLocation : HyderabadStrong RTL(verilog/system verilog) skills with experience in IP development.• Ability to verify designs by writing simple testbenches.• Strong foundation in logic synthesis and timing closure concepts.• Good knowledge of SoC architecture, AXI bus protocols, hardware debug.•...

Senior RTL Design Engineers Experience : 3-5 years Location : Hyderabad Strong RTL(verilog/system verilog) skills with experience in IP development. • Ability to verify designs by writing simple testbenches. • Strong foundation in logic synthesis and timing closure concepts. • Good knowledge of SoC architecture, AXI bus protocols, hardware debug. •...

Senior RTL Design Engineers Experience : 3-5 years Location : Hyderabad Strong RTL(verilog/system verilog) skills with experience in IP development. • Ability to verify designs by writing simple testbenches. • Strong foundation in logic synthesis and timing closure concepts. • Good knowledge of SoC architecture, AXI bus protocols, hardware debug. •...

Senior RTL Design EngineersExperience : 3-5 yearsLocation : HyderabadStrong RTL(verilog/system verilog) skills with experience in IP development.• Ability to verify designs by writing simple testbenches.• Strong foundation in logic synthesis and timing closure concepts.• Good knowledge of SoC architecture, AXI bus protocols, hardware debug.•...