Network Architectural Specialist

21 hours ago


Bengaluru, Karnataka, India beBeeVerification Full time ₹ 1,80,00,000 - ₹ 2,50,00,000
Verification Engineer for Network on Chip

We are seeking a skilled Verification Engineer to design and implement verification environments for Network on Chip (NoC) blocks.

The ideal candidate will have strong experience with SystemVerilog, UVM, and object-oriented testbench development. In-depth knowledge of NoC protocols and verification tools such as Synopsys, Cadence, or Siemens is required.

You will be responsible for defining and implementing test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic.

Key Responsibilities:

  • Develop UVM-based verification environments for NoC/IP blocks.
  • Define and implement test plans, coverage models, scoreboards, monitors, and checkers.
  • Integrate and verify IPs connected via NoC.
  • Model and validate credit-based flow control, packet routing, QoS, and virtual channel behavior.

Requirements:

  • 7-14 years of experience in verification engineering.
  • Strong experience with SystemVerilog, UVM, and object-oriented testbench development.
  • In-depth knowledge of NoC protocols and verification tools.

About the Role:

Acl Digital is empowering organizations to thrive in an AI-first world by integrating AI and data-driven solutions from chip to cloud, providing strategic advantage in navigating digital transformation.



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