Advanced Technical Specialist

1 week ago

Anantapur, Andhra Pradesh, India beBeeVerification Full time ₹ 35,00,000 - ₹ 40,00,000

As a Senior Design Verification Engineer, you will be responsible for developing and executing detailed verification plans for IP blocks, subsystems, or SoCs.

Key Responsibilities include designing and building SystemVerilog/UVM-based testbenches, scoreboards, monitors, and drivers.

Additionally, you will write and maintain directed and constrained-random test cases.

You will perform GLS (Gate-Level Simulation) with SDF back-annotation, reset validation, scan chain checking, and X-propagation analysis.

Validation of processor cores or custom pipelines, including cache/memory subsystems, MMUs, and coherency, is also a key aspect of this role.

Further, you will validate high-speed protocols such as PCIe Gen4/Gen5, USB 3.x, DDR3/4/5, LPDDR, CXL.

Debugging RTL and testbench issues using waveforms, logs, and assertions is also an essential skill.

Collaboration with RTL, DFT, STA, firmware, and post-silicon teams to drive quality and coverage closure is a vital part of this position.

Analysis of functional/code/line/branch/coverage metrics and driving closure is another critical task.

Automation of regressions and result analysis using scripting languages like Python, Perl, Shell, Tcl is also expected.

Finally, contributing to methodology improvements, tool evaluation, and reusable IP verification components is a significant responsibility.

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