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Optimized Memory Designer

3 weeks ago

Dombivli, Maharashtra, India beBeeLayout Full time ₹ 15,00,000 - ₹ 25,00,000
Memory Layout Engineer

Experience in layout design of leaf cell level and top level (integration) of custom memories, such as SRAM and Register Files.

Responsibilities:
  • Work closely with circuit designers to understand schematics and translate them into optimized layouts.
  • Good understanding of Floor-planning, placement, matching, routing, parasitics and layout constraints.
  • Good understanding and debugging of physical verification checks DRC, LVS, ERC and reliability check EM and IR.
  • Good understanding of advanced process nodes 5nm and below.
Requirements:
  • Preferably with scripting experience in SKILL, Python, or TCL.
  • Required Skill Set: Experience in Custom based memories OR compiler-based memories.
  • Exposure to high-performance and/or low-power memory layout optimization techniques.
  • Minimum of 5 plus years of experience in memory layout design.
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