Chief Memory Layout Architect

2 weeks ago


Dombivli, Maharashtra, India beBeeDesign Full time ₹ 1,50,00,000 - ₹ 2,00,00,000

We are seeking an expert in Memory Compiler Design to join our team. In this role, you will play a key part in developing and implementing memory compilers layouts and memory Fast Cache instances layouts for our cutting-edge Cores.

Key Responsibilities:
  • Develop high-quality memory compilers layouts and memory Fast Cache instances layouts that meet the highest standards of PPA (Power, Performance, Area).
  • Collaborate with our engineering team to review schematics and provide feedback based on layout implications.
  • Analyze floor planning options and propose improvements to optimize performance.
Requirements:
  • Postgraduate degree in Electronic Engineering or equivalent field from a reputable University.
  • Demonstrated understanding of CMOS Transistors, their behaviors, and CMOS logic design and layout principles.
  • Knowledge of Power versus Performance versus Area trade-offs in typical CMOS design.
  • Excellent communication skills and a professional demeanor.
  • Minimum 5 years of experience in SRAM / memory layouts creation and backend verifications including EMIR analysis.
Preferred Skills:
  • Familiarity with scripting languages, e.g., Perl/skill.
  • Experience working on Cadence or Synopsys flows.

This is an exciting opportunity for someone who has a passion for circuit layouts and creating high-quality designs.



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