
Mid-Level ASIC Verification Expert
1 week ago
Job Title: Verification Engineer
About the role :
Our organization is looking for a mid-level engineer to join our team in Bangalore, India. The ideal candidate will have experience in verification using System Verilog for RISC-V based subsystems. This role will involve working on development of our next generation Control ASIC to production in 22nm technology.
Key Responsibilities :
- Create a verification plan for RISC-V based application specific IP
- Build standalone IP test benches using System Verilog
- Develop test cases, coverage models and assertions needed to ensure functional correctness of the Design Under Test (i.e., IP/SOC)
- Use the IP/SOC RTL in system Verilog based logic verification environment & complete the functional verification
- Generate functional and code coverage metrics, collaborate with IP developers on the correctness & completeness of IP functionality
- Deliver the functional test vectors needed to be used for post-silicon validation
Required Skills :
- Proficient in UVM, Verilog, System Verilog, C, Python.
- Strong understanding and experience of logic verification environments (UVM & System Verilog)
- Strong understanding of RISC-V architecture & functional verification
- Experience with processor toolchains (compiler, assembler, simulator)
- Experience with processor verification. Directed tests and random program generated tests
- Experience with functional processor simulators
- Experience with verification of secure processor boot code
- Experience with Floating point instructions implementation & verification in micro controller-based ASIC designs
Benefits :
- Ability to quickly adapt to other categories of C-based/System Verilog based IP verification
- Excellent problem-solving skills, written & verbal communication skills
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