
Advanced ASIC Verification Expert
15 hours ago
- We are seeking a skilled ASIC Engineer to lead our team in the development of advanced verification environments.
- The ideal candidate will have extensive experience with System Verilog and UVM methodologies, as well as proficiency in Perl, Python, and shell scripting.
- Responsibilities include architecting and developing block-level verification environments, defining and delivering verification suites/tests for ASICs, and collaborating with logic designers and software developers.
- A strong background in problem-solving and ASIC debugging is essential, along with excellent communication skills.
- Required qualifications include an MSEE or BSEE degree and at least 12 years of ASIC verification experience.
Key Responsibilities:
- Architect and develop block-level verification environments using System Verilog and UVM methodology.
- Define, code, and deliver verification suites/tests for ASICs.
- Verify large ASIC blocks independently and rapidly, with a focus on code coverage, functional coverage, and gate-level simulation.
- Collaborate with logic designers and software developers to resolve bugs and improve current verification infrastructure/methodology.
Required Skills:
- Advanced knowledge of System Verilog and UVM methodologies.
- Proficiency in Perl, Python, and shell scripting.
- Strong problem-solving and ASIC debugging skills.
- Excellent communication and teamwork skills.
Preferred Qualifications:
- Experience verifying networking protocols such as Ethernet.
- Constrained-random verification expertise.
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