Current jobs related to ASIC Verification Engineer, PCIe - Bengaluru, Karnataka - Meta
-
Senior design verification engineer
1 week ago
Bengaluru, Karnataka, India Prodapt ASIC Services Full timeKey job responsibilities: As a Senior Design Verification Engineer, you will define verification methodology and implement the corresponding verification plan for the So C. You will participate in the design verification and bring-up of the So C by writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test...
-
Senior Verification Engineer
1 week ago
Bengaluru, Karnataka, India beBeeVerification Full time ₹ 1,30,80,000 - ₹ 2,01,20,000Job OpportunityWe are seeking a skilled Verification Engineer to lead our critical SoC/ASIC projects.Key Responsibilities:Develop and execute verification strategies for complex ASIC/SoC projectsDesign and implement verification environments using System Verilog and UVMTranslate specifications into effective verification plansDrive functional and gate-level...
-
Senior Design Verification Engineer
4 weeks ago
Bengaluru, Karnataka, India Prodapt ASIC services (Formerly Innovative Logic) Full timeKey job responsibilities: As a Senior Design Verification Engineer, you will define verification methodology and implement the corresponding verification plan for the SoC. You will participate in the design verification and bring-up of the SoC by writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test...
-
Senior Design Verification Engineer
4 weeks ago
Bengaluru, Karnataka, India Prodapt ASIC services (Formerly Innovative Logic) Full timeKey job responsibilities: As a Senior Design Verification Engineer, you will define verification methodology and implement the corresponding verification plan for the SoC. You will participate in the design verification and bring-up of the SoC by writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test...
-
Senior Design Verification Engineer
2 weeks ago
Bengaluru, Karnataka, India Prodapt ASIC services (Formerly Innovative Logic) Full timeKey job responsibilities:As a Senior Design Verification Engineer, you will define verification methodology and implement the corresponding verification plan for the SoC. You will participate in the design verification and bring-up of the SoC by writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test benches,...
-
Senior Design Verification Engineer
2 weeks ago
Bengaluru, Karnataka, India Prodapt ASIC services (Formerly Innovative Logic) Full timeKey job responsibilities: As a Senior Design Verification Engineer, you will define verification methodology and implement the corresponding verification plan for the SoC. You will participate in the design verification and bring-up of the SoC by writing relevant tests, coverages, assertions, developing automation infrastructure, debugging code, test...
-
Senior ASIC Verification Specialist
1 week ago
Bengaluru, Karnataka, India beBeeVerification Full time ₹ 20,00,000 - ₹ 30,00,000Job Overview:We are seeking a highly skilled Verification Engineer to join our ASIC Team. As a Verification Engineer, you will be responsible for overall IP verification from test plan creation to signoff.You will work closely with similar domain specialists across geographical locations on core technical initiatives. Key skills required include good...
-
PCIe Verification Specialist
6 days ago
Bengaluru, Karnataka, India beBeeVerification Full time ₹ 15,00,000 - ₹ 22,00,000PCIe Verification Engineer">As a PCIe Verification Engineer, you will be responsible for leading the verification of PCIe interface designs, ensuring compliance with PCIe protocol standards (e.g. PCIe Gen 3/4/5/6, USB3, etc.). You will develop and implement scalable, reusable, and efficient testbenches for PCIe designs using SystemVerilog, UVM (Universal...
-
Principal ASIC Verification Engineer
7 days ago
Bengaluru, Karnataka, India beBeeSeniorDesignVerificationEngineer Full time ₹ 30,00,000 - ₹ 40,00,000As a senior design verification engineer, you will play a pivotal role in defining and implementing verification methodologies for complex System-on-Chip (SoC) designs.Your primary responsibility will be to develop and execute comprehensive verification plans, leveraging cutting-edge tools and technologies to ensure the highest level of design quality.With a...
-
PCIe Verification Specialist
1 week ago
Bengaluru, Karnataka, India beBeeVerification Full time ₹ 1,50,00,000 - ₹ 2,50,00,000Job Opportunity: We are seeking a seasoned Verification Engineer to lead the verification of PCIe interface designs, ensuring compliance with industry-standard protocols.Key Responsibilities:Create and implement scalable, reusable, and efficient testbenches for PCIe designs using SystemVerilog and UVM methodologies.Develop detailed verification plans for...
ASIC Verification Engineer, PCIe
2 weeks ago
As a Design Verification Engineer, you will be part of a team working with the best in the industry, focused on developing ASIC solutions for Meta's data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based testbench development to verification closure. Along with traditional simulation, use other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.
Responsibilities
Develop and execute verification plans, test cases, and scripts to ensure PCIe interface functionality, performance, and compliance with industry standards Collaborate with design teams to understand the PCIe interface architecture and identify potential issues Create and maintain testbenches, including simulation models and tests Perform simulation-based testing, including functional, performance, and compliance testing Analyze test results, identify defects, and work with design teams to resolve issues Stay up-to-date with industry trends, standards, and best practices related to PCIe verification Debug, root-cause and resolve functional failures in the design, partnering with the Design team Mentor engineers to drive and deliver high confidence verification for highly complex ASIC projects
Qualifications
Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience At least 8+ years of relevant experience Track record of 'first-pass success' in ASIC development Good knowledge of PCIe specifications, protocols, and standards covering Root Complex, End Point and Switch Good hands-on verification experience in PCIe Transaction, Link and Physical layer Hands-on experience in Verilog, SystemVerilog, UVM , C/C++, Python based verification Experience in IP, Cluster and SoC level verification in both RTL and Gate Level Setup Proficiency in scripting languages such as Python, Perl, or TCL to build tools and flows for verification environments Experience in architecting and implementing DV setup for complex Subsystem and ASICs Experience using analytical skills to craft novel solutions to tackle industry-level complex designs Demonstrated experience with effective collaboration with cross functional teams 12+ years of experience in development of PCIe Gen6/Gen7 DV testbench and infrastructure from scratch Strong knowledge of PCIe specifications, protocols, and standards covering Root Complex, End Point and Switch (Gen1 to Gen7 and ECNs) Hands-on experience with integration and usage of varied PCIe vendor VIP Experience in performance verification of PCIe Sub-System for AI/ML Applications etc Experience with development of fully automated flows and scripts for data exploration, analysis and performance verification Experience with revision control systems like Mercurial(Hg), Git or SVN Experience with simulators and waveform debugging tools Experience working across and building relationships with cross-functional design, model and emulation teams
