Senior ASIC Physical Design Director

We are seeking a highly experienced Physical Design Engineer to join our team at Mulya Technologies. In this role, you will be responsible for performing hands-on physical design and verification tasks across projects in advanced process nodes.Key responsibilities include managing project-specific ASIC development flow setup and maintenance, as well as...

About the RoleWe are seeking a highly skilled Senior ASIC Physical Design Engineer to join our team at Bitsilica. In this role, you will be responsible for utilizing leading edge physical design EDA tools to implement large ASICs with 100~400 million gate complexity.The ideal candidate will have strong technical hands-on competency in using commercial and...

Job OverviewTessolve is a dynamic organization that thrives on innovation and collaboration. We are seeking an experienced Senior ASIC Physical Design Manager to join our team in Bangalore or Chennai.

Job Title: Senior ASIC Design EngineerJob Summary: We are seeking a highly skilled Senior ASIC Design Engineer to join our team at Mulya Technologies. As a key member of our design team, you will be responsible for performing hands-on physical design and verification tasks across projects in advanced process nodes.Responsibilities:Create and maintain...

As a Senior ASIC Physical Design Engineer at Cisco, you will be part of our innovative Physical Design team in Bangalore, India. Your primary focus will be on creating next-generation networking chips in advanced process nodes. You will drive the backend process through the entire RTL 2 GDS Implementation flow, including hierarchical floor planning, place &...

**Key Responsibilities:**Drive the design and development of high-performance ASICs for cutting-edge applications.Leverage in-depth knowledge of EDA tools and flows to optimize design compiler and fusion compiler flows.Develop and implement physical synthesis techniques using Fusion Compiler and Genus to improve design quality and reduce power...

Job DescriptionWe are seeking a highly skilled Senior Physical Design Engineer to join our team at ACL Digital in Bangalore. The successful candidate will be responsible for leading the physical design of complex ASICs from conceptualization to implementation.Key Responsibilities:Develop and execute physical design flows, including floor planning, placement,...

Key Responsibilities: Drive the backend process through the entire RTL 2 GDS Implementation flow, including hierarchical floor planning, place & route, timing closure, power integrity, static timing verification, physical verification, and equivalence checks, with a focus on performance and die size optimization.Requirements: Analyze current generation...

Job Requirements:For the role of Senior Physical Verification Lead Engineer at ACL Digital, we are seeking a highly experienced professional in ASIC physical design. The ideal candidate must possess a solid educational background in EE/ECE and a minimum of 6 years of experience in the field.Key Responsibilities:Estimating power using industry-standard...

Technical Expertise:Proficient in timing closure methodologies, including STA timing closure.Develops pre- and post-layout constraints to ensure timing closure.Collaborates with the design team to create functional and DFT constraints.Integrates IP-level constraints.Defines multi-voltage and switching-aware corner cases.Understands RC/C model...

Key Responsibilities:Develop and execute comprehensive physical design strategies for complex ASICs, ensuring optimal performance, power consumption, and area efficiency.Collaborate with cross-functional teams to integrate design requirements, ensuring timely and cost-effective delivery.Design and implement efficient floorplanning, placement, and routing...

Job SummaryAlwyn Global seeks a highly skilled Senior ASIC Design Engineer to lead its Physical Design team. This role involves overseeing the design and development of complex ASICs, ensuring timely delivery and adherence to quality standards. The ideal candidate will have a strong background in physical design, excellent leadership skills, and experience...

ACL Digital OverviewWe are a leading digital solutions company, and we're looking for an experienced Senior Timing Closure Expert to join our team.Salary: ₹1,200,000 - ₹1,800,000 per annumJob DescriptionAs a Senior Timing Closure Expert, you will be responsible for leading the timing closure efforts for our ASIC physical design projects. You will work...

Job Description:Achieve excellence as a Senior ASIC Physical Design Engineer with ACL Digital, where you will spearhead the development of cutting-edge Timing Closure methodologies.Responsibilities:Drive pre and post-layout constraint development to optimize timing closure.Collaborate with design teams to create functional DFT constraints, ensuring seamless...

About the Role:We are seeking a highly skilled Principal ASIC Physical Design Engineer to join our team at ADCI - BLR 14 SEZ. As a key member of our Physical Design team, you will be responsible for driving the development of next-generation silicon IP for our cutting-edge edge computing solutions.Key Responsibilities:Collaborate with RTL/logic designers to...

Achieve Excellence in ASIC Physical Design with ACL DigitalACL Digital is committed to delivering cutting-edge technology solutions, and we're seeking an exceptional Design Engineering Manager to lead our ASIC physical design efforts. This role requires a highly skilled professional with expertise in designing and developing complex digital integrated...

Key Responsibilities:As a Physical Design Engineer at Cisco, you will be part of a creative and talented team in Bangalore, India. Your primary focus will be on creating next-generation state-of-the-art networking chips in advanced process nodes. You will drive the backend process through the entire RTL 2 GDS implementation flow, including hierarchical floor...

We are seeking a seasoned ASIC Design Engineer to join our team. As a member of our ASIC backend/timing team, you'll be working on product designs, focusing on tasks such as clocks, timing convergence, chip layout planning, design optimization, and automation of work flows. Specifically, you'll be working on full chip layout planning, timing closure signoff,...

About the RoleAs a Senior ASIC Design Manager at Mulya Technologies, you will play a pivotal role in shaping the design and development of complex ASICs and System-on-Chip architectures for various electronic devices.Key ResponsibilitiesCollaborate with architecture and physical design teams to create power/area/performance optimized RTL designs.Participate...

Overview:Cisco is seeking a highly skilled Senior ASIC Physical Design Engineer to join our team in Bangalore, India. As a member of this team, you will be responsible for creating next-generation state-of-the-art networking chips in advanced process nodes.About the Role:The successful candidate will drive the backend process through the entire RTL 2 GDS...