
DFT Architecture Lead
6 days ago
Seeking a seasoned Digital Fault Tolerance (DFT) Engineer to spearhead the development and implementation of cutting-edge DFT architectures for ASIC/SoC designs.
This role requires collaboration with RTL and physical design teams to ensure seamless integration of DFT features. Key responsibilities include:
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- Developing and implementing DFT architectures for ASIC/SoC designs.
- Inserting and verifying scan chains, boundary scan (JTAG), MBIST, LBIST, and other test structures.
- Collaborating with RTL and physical design teams to ensure seamless integration of DFT features.
- Generating and validating test patterns using ATPG tools for stuck-at, transition, and path delay faults.
- Performing fault simulation and coverage analysis to optimize test quality.
- Supporting silicon bring-up and debug of test-related issues.
- Working with ATE teams to develop test programs and support production testing.
The ideal candidate will have 3 years of experience in DFT engineering, excellent communication skills, and a passion for innovation. If you are interested in this exciting opportunity, please submit your updated resume to janagaradha.n@acldigital.com
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DFT Testability Engineer
1 day ago
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DFT Expert Leader
5 days ago
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Advanced DFT Integration Specialist
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Advanced Test Architect
1 day ago
Malappuram, Kerala, India beBeeDft Full time ₹ 21,25,754 - ₹ 29,48,715Senior DFT ArchitectWe are seeking a highly skilled Senior DFT Architect to develop and implement cutting-edge DFT architectures with a focus on MBIST for next-generation SoCs.The ideal candidate will design and implement DFT architecture with emphasis on MBIST for complex SoCs, integrate MBIST IPs, generate test insertion and verification infrastructure,...
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Senior Design For Testability Engineer
4 days ago
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Lead Architectural Designer
6 days ago
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Chip Architect
1 day ago
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Leading Architectural Design Projects
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Digital Fault Tolerance Engineer
2 days ago
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Lead Architectural Visualisation Specialist
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