Chip Architect

We are seeking an experienced Architecture Lead to oversee the development of cutting-edge chip architecture and design execution.

• Oversee multi-block design integration to ensure seamless collaboration among cross-functional teams.
• Coordinate handoff and sign-off of key stages: RTL freeze, synthesis, place & route, static timing analysis, and DFT to guarantee quality and efficiency.
• Drive IP integration, clocking strategy, and power domain definition to optimize performance and power consumption.
• Collaborate with external IP vendors and EDA tool providers to leverage best-in-class technologies.

Requirements:

• Bachelor's degree in Electrical Engineering, Electronics, or Computer Engineering.
• Master's or PhD in VLSI Design, Microelectronics, or Computer Architecture (preferred).

Desirable Skills:

• Digital IC design from RTL to GDSII.
• System-level architecture and IP integration.
• Timing closure (STA) and power-performance-area (PPA) optimization.
• UPF/CPF for low-power design.
• Familiarity with design for manufacturability, test (DFT), and silicon debug.