Optimizing Performance Across Chip Development Stages

5 days ago

Bengaluru, Karnataka, India beBeePerformance Full time ₹ 1,04,000 - ₹ 1,30,878
Job Description:

We are seeking a talented Performance and Power Analysis Engineer to join our team. As a key member of our Display Systems group, you will be responsible for analyzing, modeling, and optimizing performance and power across chip development stages.

You will collaborate with architecture, design, software, and verification teams to meet aggressive power and performance goals for next-gen semiconductor technology.

This is an exciting opportunity to work on cutting-edge projects and contribute to the success of our company.

Responsibilities:
  • Develop and maintain architectural-level and cycle-accurate models for performance and power estimation.
  • Analyze trade-offs among performance, power, and area (PPA) at architecture and microarchitecture levels.
  • Influence design decisions early in the design cycle through power and performance analysis.
  • Collaborate with architecture and design teams to evaluate design options and optimize power/performance.
  • Identify performance bottlenecks and power inefficiencies via detailed analysis.
  • Perform power profiling and characterization under various workloads and operating conditions.
  • Implement power reduction techniques such as clock gating, power gating, voltage scaling.
  • Analyze and debug power/performance issues during simulation, emulation, and silicon bring-up.
  • Create detailed reports and presentations for cross-functional teams and senior leadership.
Requirements:
  • Bachelor's degree in Engineering, Information Systems, Computer Science, or related field with 3+ years systems engineering experience OR
  • Master's degree with 2+ years experience OR
  • PhD with 1+ year experience in systems engineering.
Preferred Qualifications:
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
  • 5–8+ years experience in performance and power analysis for ASIC or SoC designs.
  • Strong knowledge of computer architecture, microarchitecture, and digital design.
  • Experience developing/using performance and power models using SystemC, Python, C++, or custom frameworks.
  • Proficiency with performance and power tools like Synopsys PrimeTime PX.
  • Solid understanding of power management and low-power design methodologies.
  • Familiarity with simulation, emulation, silicon bring-up, and post-silicon characterization.
  • Strong analytical skills and ability to interpret complex data.
  • Excellent communication and teamwork abilities.

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