Senior ASIC Hardware Design Lead for Silicon Development

4 days ago


Bengaluru, Karnataka, India Cisco Full time
Cisco Silicon One: Senior ASIC Hardware Design Lead

About Us: The Common Hardware Group (CHG) at Cisco is responsible for designing and delivering the silicon, optics, and hardware platforms for our core Switching, Routing, and Wireless products. With a global presence across 16 countries and a team of ~2,100 employees, we strive to innovate and push boundaries in networking hardware.

About the Role: We are seeking an experienced Senior ASIC Hardware Design Lead to join our Silicon One development organization in Bangalore, India. As a key member of this team, you will focus on Design-for-Test (DFT) requirements and work closely with Front-end RTL teams, backend physical design teams, and other stakeholders to ensure seamless chip architecture and DFT integration throughout the design cycle.

Responsibilities:

  • Implement and develop innovative DFT features that support ATE, in-system test, debug, and diagnostics needs of designs.
  • Craft groundbreaking next-generation networking chips by driving DFT and quality processes through the implementation flow and post-silicon validation phases.
  • Collaborate with multi-functional teams to develop DFT IP and integrate it into full-chip designs.
  • Work closely with design/design-verification and PD teams to enable integration and validation of Test logic in all phases of implementation and post-silicon validation flows.

Requirements:

  • Bachelor's or Master's Degree in Electrical or Computer Engineering required with at least 10 years of experience.
  • Knowledge of the latest trends in DFT, test, and silicon engineering.
  • Experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan.
  • Experience with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime.

About You: As a seasoned ASIC Design for Test Hardware Engineer with 10+ years of related work experience, you possess a broad mix of technologies and skills. You have excellent problem-solving skills, attention to detail, and strong verbal communication skills. Experience working with Gate level simulation, debugging with VCS and other simulators, and scripting skills in Tcl, Python/Perl are also desired.

Estimated Salary Range: $120,000 - $180,000 per annum



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